[coreboot-gerrit] New patch to review for coreboot: 953566e baytrail broadwell: Use acpi_is_wakeup_s3()

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8172

-gerrit

commit 953566e6141a7dec5547b5718d5dcbd9798033db
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Thu Jan 8 07:33:50 2015 +0200

    baytrail broadwell: Use acpi_is_wakeup_s3()
    
    Global acpi_slp_type will be declared static in a follow-up patch.
    This change also guarantees it is properly initialized before use.
    
    Change-Id: I0f074bb80f06f6f0ddf4212cd8872e94ae57f949
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/arch/x86/include/arch/acpi.h      |  1 -
 src/soc/intel/baytrail/southcluster.c |  2 +-
 src/soc/intel/baytrail/xhci.c         |  4 ++--
 src/soc/intel/broadwell/lpc.c         |  4 ++--
 src/soc/intel/broadwell/me.c          |  4 +---
 src/soc/intel/broadwell/refcode.c     | 11 +----------
 6 files changed, 7 insertions(+), 19 deletions(-)

diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h
index 502c826..2dc8bb7 100644
--- a/src/arch/x86/include/arch/acpi.h
+++ b/src/arch/x86/include/arch/acpi.h
@@ -587,7 +587,6 @@ static inline int acpi_s3_resume_allowed(void)
 }
 
 #if !IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
-#define acpi_slp_type 0
 static inline int acpi_is_wakeup(void) { return 0; }
 static inline int acpi_is_wakeup_s3(void) { return 0; }
 static inline int acpi_is_wakeup_early(void) { return 0; }
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index 5274b03..f6462fa 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -215,7 +215,7 @@ static void sc_init(device_t dev)
 			read32(gen_pmcon1) & ~DIS_SLP_X_STRCH_SUS_UP);
 	}
 
-	if (acpi_slp_type == 3)
+	if (acpi_is_wakeup_s3())
 		com1_configure_resume(dev);
 }
 
diff --git a/src/soc/intel/baytrail/xhci.c b/src/soc/intel/baytrail/xhci.c
index 8d076c2..19339e4 100644
--- a/src/soc/intel/baytrail/xhci.c
+++ b/src/soc/intel/baytrail/xhci.c
@@ -184,7 +184,7 @@ static void xhci_route_all(device_t dev)
 	/* Route ports to XHCI controller */
 	reg_script_run_on_dev(dev, xhci_route_all_script);
 
-	if (acpi_slp_type == 3)
+	if (acpi_is_wakeup_s3())
 		return;
 
 	/* Reset enabled USB3 ports */
@@ -222,7 +222,7 @@ static void xhci_init(device_t dev)
 	};
 
 	/* Initialize XHCI controller for boot or resume path */
-	if (acpi_slp_type == 3)
+	if (acpi_is_wakeup_s3())
 		reg_script_run_on_dev(dev, xhci_init_resume_script);
 	else
 		reg_script_run_on_dev(dev, xhci_init_boot_script);
diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c
index 394a9d7..c670440 100644
--- a/src/soc/intel/broadwell/lpc.c
+++ b/src/soc/intel/broadwell/lpc.c
@@ -394,7 +394,7 @@ static void pch_cg_init(device_t dev)
 static void pch_set_acpi_mode(void)
 {
 #if CONFIG_HAVE_SMI_HANDLER
-	if (acpi_slp_type != 3) {
+	if (!acpi_is_wakeup_s3()) {
 		printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
 		outb(APM_CNT_ACPI_DISABLE, APM_CNT);
 		printk(BIOS_DEBUG, "done.\n");
@@ -551,7 +551,7 @@ static void pch_lpc_read_resources(device_t dev)
 
 	/* Allocate ACPI NVS in CBMEM */
 	gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(global_nvs_t));
-	if (acpi_slp_type != 3 && gnvs)
+	if (!acpi_is_wakeup_s3() && gnvs)
 		memset(gnvs, 0, sizeof(global_nvs_t));
 }
 
diff --git a/src/soc/intel/broadwell/me.c b/src/soc/intel/broadwell/me.c
index 2bdb1ed..9fc6a41 100644
--- a/src/soc/intel/broadwell/me.c
+++ b/src/soc/intel/broadwell/me.c
@@ -830,13 +830,11 @@ static void intel_me_init(device_t dev)
 
 static void intel_me_enable(device_t dev)
 {
-#if CONFIG_HAVE_ACPI_RESUME
 	/* Avoid talking to the device in S3 path */
-	if (acpi_slp_type == 3) {
+	if (acpi_is_wakeup_s3()) {
 		dev->enabled = 0;
 		pch_disable_devfn(dev);
 	}
-#endif
 }
 
 static struct device_operations device_ops = {
diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c
index a745101..d66d036 100644
--- a/src/soc/intel/broadwell/refcode.c
+++ b/src/soc/intel/broadwell/refcode.c
@@ -30,15 +30,6 @@
 #include <broadwell/pei_wrapper.h>
 #include <broadwell/ramstage.h>
 
-static inline int is_s3_resume(void)
-{
-#if CONFIG_HAVE_ACPI_RESUME
-	return acpi_slp_type == 3;
-#else
-	return 0;
-#endif
-}
-
 static inline struct ramstage_cache *next_cache(struct ramstage_cache *c)
 {
 	return (struct ramstage_cache *)&c->program[c->size];
@@ -136,7 +127,7 @@ static pei_wrapper_entry_t load_reference_code(void)
 	};
 	int ret;
 
-	if (is_s3_resume()) {
+	if (acpi_is_wakeup_s3()) {
 		return load_refcode_from_cache();
 	}