[coreboot-gerrit] Patch set updated for coreboot: ba76944 Re-factor 'to_flash_offset()' into 'spi_flash.h'
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Wed Jan 7 16:57:51 CET 2015
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8165
-gerrit
commit ba76944f5f143e95992cfb4cbc798bea993de12c
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Sat May 24 04:09:50 2014 +1000
Re-factor 'to_flash_offset()' into 'spi_flash.h'
Re-factor to_flash_offset() into 'spi_flash.h' header. Motivated by
Clang complaining that the function 'to_flash_offset' is unused.
Change-Id: Ie2a8ac3cddac1cd87f1197efcd1bc9eb3189136e
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
src/drivers/intel/fsp/fastboot_cache.c | 13 ++-----------
src/include/spi_flash.h | 8 ++++++++
src/northbridge/intel/haswell/mrccache.c | 7 +------
src/northbridge/intel/sandybridge/mrccache.c | 7 +------
src/soc/intel/common/nvm.c | 10 ++--------
src/soc/intel/fsp_baytrail/nvm.c | 13 ++-----------
6 files changed, 16 insertions(+), 42 deletions(-)
diff --git a/src/drivers/intel/fsp/fastboot_cache.c b/src/drivers/intel/fsp/fastboot_cache.c
index 64982d8..907e143 100644
--- a/src/drivers/intel/fsp/fastboot_cache.c
+++ b/src/drivers/intel/fsp/fastboot_cache.c
@@ -31,15 +31,6 @@
#include <lib.h> // hexdump
#include "fsp_util.h"
-#ifndef CONFIG_VIRTUAL_ROM_SIZE
-#error "CONFIG_VIRTUAL_ROM_SIZE must be set."
-#endif
-
-/* convert a pointer to flash area into the offset inside the flash */
-static inline u32 to_flash_offset(void *p) {
- return ((u32)p + CONFIG_VIRTUAL_ROM_SIZE);
-}
-
static struct mrc_data_container *next_mrc_block(
struct mrc_data_container *mrc_cache)
{
@@ -205,7 +196,7 @@ void update_mrc_cache(void *unused)
"Need to erase the MRC cache region of %d bytes at %p\n",
cache_size, cache_base);
- flash->erase(flash, to_flash_offset(cache_base), cache_size);
+ flash->erase(flash, to_flash_offset(flash, cache_base), cache_size);
/* we will start at the beginning again */
cache = cache_base;
@@ -213,7 +204,7 @@ void update_mrc_cache(void *unused)
/* 4. write mrc data with flash->write() */
printk(BIOS_DEBUG, "Write MRC cache update to flash at %p\n",
cache);
- flash->write(flash, to_flash_offset(cache),
+ flash->write(flash, to_flash_offset(flash, cache),
current->mrc_data_size + sizeof(*current), current);
}
diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h
index 7e430d0..0d8331e 100644
--- a/src/include/spi_flash.h
+++ b/src/include/spi_flash.h
@@ -76,4 +76,12 @@ static inline int spi_flash_erase(struct spi_flash *flash, u32 offset,
return flash->erase(flash, offset, len);
}
+#if !defined(__PRE_RAM__)
+/* convert a pointer to flash area into the offset inside the flash */
+static inline u32 to_flash_offset(struct spi_flash *flash, void *p) {
+ u32 size = CONFIG_VIRTUAL_ROM_SIZE ? CONFIG_VIRTUAL_ROM_SIZE : flash->size;
+ return ((u32)p + size);
+}
+#endif /* !defined(__PRE_RAM__) */
+
#endif /* _SPI_FLASH_H_ */
diff --git a/src/northbridge/intel/haswell/mrccache.c b/src/northbridge/intel/haswell/mrccache.c
index a921e04..88af789 100644
--- a/src/northbridge/intel/haswell/mrccache.c
+++ b/src/northbridge/intel/haswell/mrccache.c
@@ -33,11 +33,6 @@
#include <vendorcode/google/chromeos/fmap.h>
#endif
-/* convert a pointer to flash area into the offset inside the flash */
-static inline u32 to_flash_offset(struct spi_flash *flash, void *p) {
- return ((u32)p + flash->size);
-}
-
static struct mrc_data_container *next_mrc_block(
struct mrc_data_container *mrc_cache)
{
@@ -228,7 +223,7 @@ BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = {
BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
update_mrc_cache, NULL),
};
-#endif
+#endif /* !defined(__PRE_RAM__) */
struct mrc_data_container *find_current_mrc_cache(void)
{
diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c
index c84ff82..664fb7f 100644
--- a/src/northbridge/intel/sandybridge/mrccache.c
+++ b/src/northbridge/intel/sandybridge/mrccache.c
@@ -33,11 +33,6 @@
#include <vendorcode/google/chromeos/fmap.h>
#endif
-/* convert a pointer to flash area into the offset inside the flash */
-static inline u32 to_flash_offset(struct spi_flash *flash, void *p) {
- return ((u32)p + flash->size);
-}
-
static struct mrc_data_container *next_mrc_block(
struct mrc_data_container *mrc_cache)
{
@@ -227,7 +222,7 @@ BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = {
BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
update_mrc_cache, NULL),
};
-#endif
+#endif /* !defined(__PRE_RAM__) */
struct mrc_data_container *find_current_mrc_cache(void)
{
diff --git a/src/soc/intel/common/nvm.c b/src/soc/intel/common/nvm.c
index 791422f..54b3baf 100644
--- a/src/soc/intel/common/nvm.c
+++ b/src/soc/intel/common/nvm.c
@@ -46,12 +46,6 @@ static int nvm_init(void)
return 0;
}
-/* Convert memory mapped pointer to flash offset. */
-static inline uint32_t to_flash_offset(void *p)
-{
- return CONFIG_ROM_SIZE + (uintptr_t)p;
-}
-
int nvm_is_erased(const void *start, size_t size)
{
const uint8_t *cur = start;
@@ -70,7 +64,7 @@ int nvm_erase(void *start, size_t size)
{
if (nvm_init() < 0)
return -1;
- return flash->erase(flash, to_flash_offset(start), size);
+ return flash->erase(flash, to_flash_offset(flash, start), size);
}
/* Write data to NVM. Returns 0 on success < 0 on error. */
@@ -78,5 +72,5 @@ int nvm_write(void *start, const void *data, size_t size)
{
if (nvm_init() < 0)
return -1;
- return flash->write(flash, to_flash_offset(start), size, data);
+ return flash->write(flash, to_flash_offset(flash, start), size, data);
}
diff --git a/src/soc/intel/fsp_baytrail/nvm.c b/src/soc/intel/fsp_baytrail/nvm.c
index 0224463..d1e5223 100644
--- a/src/soc/intel/fsp_baytrail/nvm.c
+++ b/src/soc/intel/fsp_baytrail/nvm.c
@@ -47,15 +47,6 @@ static int nvm_init(void)
return 0;
}
-/* Convert memory mapped pointer to flash offset. */
-static inline uint32_t to_flash_offset(void *p)
-{
-#ifndef CONFIG_ROM_SIZE
-#error CONFIG_ROM_SIZE must be set.
-#endif
- return CONFIG_ROM_SIZE + (uintptr_t)p;
-}
-
int nvm_is_erased(const void *start, size_t size)
{
const uint8_t *cur = start;
@@ -74,7 +65,7 @@ int nvm_erase(void *start, size_t size)
{
if (nvm_init() < 0)
return -1;
- flash->erase(flash, to_flash_offset(start), size);
+ flash->erase(flash, to_flash_offset(flash, start), size);
return 0;
}
@@ -83,6 +74,6 @@ int nvm_write(void *start, const void *data, size_t size)
{
if (nvm_init() < 0)
return -1;
- flash->write(flash, to_flash_offset(start), size, data);
+ flash->write(flash, to_flash_offset(flash, start), size, data);
return 0;
}
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