[coreboot-gerrit] New patch to review for coreboot: 121152a doxygen fixes: fix parameter names to match the functions

[Martin Roth (gaumless@gmail.com)]

Martin Roth (gaumless at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8101

-gerrit

commit 121152a5bb81444d7eaefcf3f9387cf77fbdc6ae
Author: Martin Roth <martin.roth at se-eng.com>
Date:   Sun Jan 4 16:54:35 2015 -0700

    doxygen fixes: fix parameter names to match the functions
    
    The doxygen parameter names in the comments no longer matched the
    functions they were attached to.  Doxygen complains about extra
    parameter comments and uncommented parameters in the functions.
    
    Change-Id: I21b8a951f8d8d04b07c3779000eeaf1e69fed463
    Signed-off-by: Martin Roth <martin.roth at se-eng.com>
---
 src/cpu/allwinner/a10/gpio.c             | 2 +-
 src/device/device.c                      | 2 +-
 src/device/pci_device.c                  | 2 +-
 src/mainboard/intel/mohonpeak/romstage.c | 2 +-
 src/soc/samsung/exynos5250/clock.c       | 4 ++--
 src/soc/samsung/exynos5420/clock.c       | 4 ++--
 6 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/cpu/allwinner/a10/gpio.c b/src/cpu/allwinner/a10/gpio.c
index 295cdf2..5fca2d7 100644
--- a/src/cpu/allwinner/a10/gpio.c
+++ b/src/cpu/allwinner/a10/gpio.c
@@ -68,7 +68,7 @@ int gpio_get(u8 port, u8 pin)
  * configured as output pins.
  *
  * @param[in] port GPIO port of the pin (GPA -> GPS)
- * @param[in] value 32-bit mask indicating which pins to set. For a set bit, the
+ * @param[in] val 32-bit mask indicating which pins to set. For a set bit, the
  *                  corresponding pin will be set. Otherwise, it will be cleared
  */
 void gpio_write(u8 port, u32 val)
diff --git a/src/device/device.c b/src/device/device.c
index e068cee..00e323a 100644
--- a/src/device/device.c
+++ b/src/device/device.c
@@ -179,7 +179,7 @@ device_t alloc_find_dev(struct bus *parent, struct device_path *path)
  * Round a number up to an alignment.
  *
  * @param val The starting value.
- * @param roundup Alignment as a power of two.
+ * @param pow Alignment as a power of two.
  * @return Rounded up number.
  */
 static resource_t round(resource_t val, unsigned long pow)
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 8351e9c..22454d6 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -1321,7 +1321,7 @@ const char *pin_to_str(int pin)
  * device.  In this case, this function will return 4 (PIN D).
  *
  * @param dev A PCI device structure to swizzle interrupt pins for
- * @param *parent_bdg The PCI device structure for the bridge
+ * @param *parent_bridge The PCI device structure for the bridge
  *        device 'dev' is attached to
  * @return The interrupt pin number (1 - 4) that 'dev' will
  *         trigger when generating an interrupt
diff --git a/src/mainboard/intel/mohonpeak/romstage.c b/src/mainboard/intel/mohonpeak/romstage.c
index b1fb995..ba5091a 100644
--- a/src/mainboard/intel/mohonpeak/romstage.c
+++ b/src/mainboard/intel/mohonpeak/romstage.c
@@ -72,7 +72,7 @@ void late_mainboard_romstage_entry(void)
 
 /**
  * Get function disables - most of these will be done automatically
- * @param fd_mask
+ * @param mask pointer to the function-disable bitfield
  */
 void get_func_disables(uint32_t *mask)
 {
diff --git a/src/soc/samsung/exynos5250/clock.c b/src/soc/samsung/exynos5250/clock.c
index 1de2ab2..a00af02 100644
--- a/src/soc/samsung/exynos5250/clock.c
+++ b/src/soc/samsung/exynos5250/clock.c
@@ -475,8 +475,8 @@ void clock_ll_set_ratio(enum periph_id periph_id, unsigned divisor)
  *
  * @param main_scalar_bits	Number of main scalar bits, must be > 0 and < 32
  * @param fine_scalar_bits	Number of fine scalar bits, must be > 0 and < 32
- * @param input_freq		Clock frequency to be scaled in Hz
- * @param target_freq		Desired clock frequency in Hz
+ * @param input_rate		Clock frequency to be scaled in Hz
+ * @param target_rate		Desired clock frequency in Hz
  * @param best_fine_scalar	Pointer to store the fine stage divisor
  *
  * @return best_main_scalar	Main scalar for desired frequency or -1 if none
diff --git a/src/soc/samsung/exynos5420/clock.c b/src/soc/samsung/exynos5420/clock.c
index 5bbeb04..5cf3583 100644
--- a/src/soc/samsung/exynos5420/clock.c
+++ b/src/soc/samsung/exynos5420/clock.c
@@ -439,8 +439,8 @@ void clock_ll_set_ratio(enum periph_id periph_id, unsigned divisor)
  *
  * @param main_scalar_bits	Number of main scalar bits, must be > 0 and < 32
  * @param fine_scalar_bits	Number of fine scalar bits, must be > 0 and < 32
- * @param input_freq		Clock frequency to be scaled in Hz
- * @param target_freq		Desired clock frequency in Hz
+ * @param input_rate		Clock frequency to be scaled in Hz
+ * @param target_rate		Desired clock frequency in Hz
  * @param best_fine_scalar	Pointer to store the fine stage divisor
  *
  * @return best_main_scalar	Main scalar for desired frequency or -1 if none