[coreboot-gerrit] Patch set updated for coreboot: e20e40a superio/smsc/lpc47m10x: Use link-time symbols over .c inclusion

Edward O'Callaghan (eocallaghan@alterapraxis.com) gerrit at coreboot.org
Sun Jan 4 07:47:56 CET 2015


Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8080

-gerrit

commit e20e40acfaa6a5d380fd0826681d42823b85ddd7
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Sun Jan 4 16:24:14 2015 +1100

    superio/smsc/lpc47m10x: Use link-time symbols over .c inclusion
    
    Change-Id: I4a3639c05231eacd016ec3873330f9844befd448
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/mainboard/aopen/dxplplusu/romstage.c  |  3 +--
 src/superio/smsc/lpc47m10x/Makefile.inc   |  1 +
 src/superio/smsc/lpc47m10x/early_serial.c |  4 +++-
 src/superio/smsc/lpc47m10x/lpc47m10x.h    | 11 ++++++++---
 4 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/src/mainboard/aopen/dxplplusu/romstage.c b/src/mainboard/aopen/dxplplusu/romstage.c
index 86470b3..8bb179a 100644
--- a/src/mainboard/aopen/dxplplusu/romstage.c
+++ b/src/mainboard/aopen/dxplplusu/romstage.c
@@ -29,8 +29,7 @@
 #include "northbridge/intel/e7505/raminit.h"
 
 #include <device/pnp_def.h>
-#include "superio/smsc/lpc47m10x/early_serial.c"
-
+#include <superio/smsc/lpc47m10x/lpc47m10x.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, LPC47M10X2_SP1)
 
diff --git a/src/superio/smsc/lpc47m10x/Makefile.inc b/src/superio/smsc/lpc47m10x/Makefile.inc
index c5dd310..876cb0c 100644
--- a/src/superio/smsc/lpc47m10x/Makefile.inc
+++ b/src/superio/smsc/lpc47m10x/Makefile.inc
@@ -22,4 +22,5 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301  USA
 ##
 
+romstage-$(CONFIG_SUPERIO_SMSC_LPC47M10X) += early_serial.c
 ramstage-$(CONFIG_SUPERIO_SMSC_LPC47M10X) += superio.c
diff --git a/src/superio/smsc/lpc47m10x/early_serial.c b/src/superio/smsc/lpc47m10x/early_serial.c
index 1174120..59a53f2 100644
--- a/src/superio/smsc/lpc47m10x/early_serial.c
+++ b/src/superio/smsc/lpc47m10x/early_serial.c
@@ -19,6 +19,8 @@
  */
 
 #include <arch/io.h>
+#include <device/pnp.h>
+#include <stdint.h>
 #include "lpc47m10x.h"
 
 static void pnp_enter_conf_state(pnp_devfn_t dev)
@@ -40,7 +42,7 @@ static void pnp_exit_conf_state(pnp_devfn_t dev)
  * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
  * @param iobase Processor I/O port address to assign to this serial device.
  */
-static void lpc47m10x_enable_serial(pnp_devfn_t dev, u16 iobase)
+void lpc47m10x_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/smsc/lpc47m10x/lpc47m10x.h b/src/superio/smsc/lpc47m10x/lpc47m10x.h
index e851048..9814c8e 100644
--- a/src/superio/smsc/lpc47m10x/lpc47m10x.h
+++ b/src/superio/smsc/lpc47m10x/lpc47m10x.h
@@ -20,8 +20,8 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301  USA
  */
 
-#ifndef SUPERIO_SMSC_LPC47M10X_LPC47M10X_H
-#define SUPERIO_SMSC_LPC47M10X_LPC47M10X_H
+#ifndef SUPERIO_SMSC_LPC47M10X_H
+#define SUPERIO_SMSC_LPC47M10X_H
 
 #define LPC47M10X2_FDC              0   /* Floppy */
 #define LPC47M10X2_PP               3   /* Parallel Port */
@@ -34,4 +34,9 @@
 
 #define LPC47M10X2_MAX_CONFIG_REGISTER	0x5F
 
-#endif
+#include <arch/io.h>
+#include <stdint.h>
+
+void lpc47m10x_enable_serial(pnp_devfn_t dev, u16 iobase);
+
+#endif /* SUPERIO_SMSC_LPC47M10X_H */



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