[coreboot-gerrit] New patch to review for coreboot: e017930 platform_cfg.h: Fixes for doxygen
Martin Roth (gaumless@gmail.com)
gerrit at coreboot.org
Sun Jan 4 05:15:20 CET 2015
Martin Roth (gaumless at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8071
-gerrit
commit e0179305b5b7ba9c559c16d6c58fe77ec3cc2a05
Author: Martin Roth <martin.roth at se-eng.com>
Date: Mon Dec 29 22:08:15 2014 -0700
platform_cfg.h: Fixes for doxygen
- Move @def BIOS_SIZE description to the next line
- SB_GEN2 changed to SB_GPP_GEN2
- Move the SIO_HWM_BASE_ADDRESS description to the next line
Change-Id: Ia3496b0108484f557627304553461932a100dfa5
Signed-off-by: Martin Roth <martin.roth at se-eng.com>
---
src/mainboard/advansus/a785e-i/platform_cfg.h | 8 +++++---
src/mainboard/amd/inagua/platform_cfg.h | 5 +++--
src/mainboard/amd/persimmon/platform_cfg.h | 5 +++--
src/mainboard/amd/south_station/platform_cfg.h | 5 +++--
src/mainboard/amd/torpedo/platform_cfg.h | 3 ++-
src/mainboard/amd/union_station/platform_cfg.h | 5 +++--
src/mainboard/asrock/e350m1/platform_cfg.h | 8 +++++---
src/mainboard/asus/m5a88-v/platform_cfg.h | 8 +++++---
src/mainboard/avalue/eax-785e/platform_cfg.h | 8 +++++---
src/mainboard/gizmosphere/gizmo/platform_cfg.h | 5 +++--
src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h | 5 +++--
src/mainboard/lippert/frontrunner-af/platform_cfg.h | 5 +++--
src/mainboard/lippert/toucan-af/platform_cfg.h | 5 +++--
13 files changed, 46 insertions(+), 29 deletions(-)
diff --git a/src/mainboard/advansus/a785e-i/platform_cfg.h b/src/mainboard/advansus/a785e-i/platform_cfg.h
index 6944ab2..29f92d2 100644
--- a/src/mainboard/advansus/a785e-i/platform_cfg.h
+++ b/src/mainboard/advansus/a785e-i/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
@@ -212,7 +213,8 @@
#define GEC_CONFIG 0
/**
- * @def SIO_HWM_BASE_ADDRESS Super IO HWM base address
+ * @def SIO_HWM_BASE_ADDRESS
+ * Super IO HWM base address
*/
#define SIO_HWM_BASE_ADDRESS 0x290
diff --git a/src/mainboard/amd/inagua/platform_cfg.h b/src/mainboard/amd/inagua/platform_cfg.h
index 4bd6a0e..9ca6d95 100644
--- a/src/mainboard/amd/inagua/platform_cfg.h
+++ b/src/mainboard/amd/inagua/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
diff --git a/src/mainboard/amd/persimmon/platform_cfg.h b/src/mainboard/amd/persimmon/platform_cfg.h
index 5357370..f1b0fdc 100644
--- a/src/mainboard/amd/persimmon/platform_cfg.h
+++ b/src/mainboard/amd/persimmon/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
diff --git a/src/mainboard/amd/south_station/platform_cfg.h b/src/mainboard/amd/south_station/platform_cfg.h
index 4bd6a0e..9ca6d95 100644
--- a/src/mainboard/amd/south_station/platform_cfg.h
+++ b/src/mainboard/amd/south_station/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
diff --git a/src/mainboard/amd/torpedo/platform_cfg.h b/src/mainboard/amd/torpedo/platform_cfg.h
index de4e89d..311214c 100644
--- a/src/mainboard/amd/torpedo/platform_cfg.h
+++ b/src/mainboard/amd/torpedo/platform_cfg.h
@@ -25,7 +25,8 @@
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In Hudson-2, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
diff --git a/src/mainboard/amd/union_station/platform_cfg.h b/src/mainboard/amd/union_station/platform_cfg.h
index 4bd6a0e..9ca6d95 100644
--- a/src/mainboard/amd/union_station/platform_cfg.h
+++ b/src/mainboard/amd/union_station/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
diff --git a/src/mainboard/asrock/e350m1/platform_cfg.h b/src/mainboard/asrock/e350m1/platform_cfg.h
index 6944ab2..29f92d2 100644
--- a/src/mainboard/asrock/e350m1/platform_cfg.h
+++ b/src/mainboard/asrock/e350m1/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
@@ -212,7 +213,8 @@
#define GEC_CONFIG 0
/**
- * @def SIO_HWM_BASE_ADDRESS Super IO HWM base address
+ * @def SIO_HWM_BASE_ADDRESS
+ * Super IO HWM base address
*/
#define SIO_HWM_BASE_ADDRESS 0x290
diff --git a/src/mainboard/asus/m5a88-v/platform_cfg.h b/src/mainboard/asus/m5a88-v/platform_cfg.h
index 6944ab2..25574b7 100644
--- a/src/mainboard/asus/m5a88-v/platform_cfg.h
+++ b/src/mainboard/asus/m5a88-v/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
@@ -212,7 +213,8 @@
#define GEC_CONFIG 0
/**
- * @def SIO_HWM_BASE_ADDRESS Super IO HWM base address
+ * @def SIO_HWM_BASE_ADDRESS
+ * Super IO HWM base address
*/
#define SIO_HWM_BASE_ADDRESS 0x290
diff --git a/src/mainboard/avalue/eax-785e/platform_cfg.h b/src/mainboard/avalue/eax-785e/platform_cfg.h
index 6944ab2..25574b7 100644
--- a/src/mainboard/avalue/eax-785e/platform_cfg.h
+++ b/src/mainboard/avalue/eax-785e/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
@@ -212,7 +213,8 @@
#define GEC_CONFIG 0
/**
- * @def SIO_HWM_BASE_ADDRESS Super IO HWM base address
+ * @def SIO_HWM_BASE_ADDRESS
+ * Super IO HWM base address
*/
#define SIO_HWM_BASE_ADDRESS 0x290
diff --git a/src/mainboard/gizmosphere/gizmo/platform_cfg.h b/src/mainboard/gizmosphere/gizmo/platform_cfg.h
index 401d981..8163af3 100644
--- a/src/mainboard/gizmosphere/gizmo/platform_cfg.h
+++ b/src/mainboard/gizmosphere/gizmo/platform_cfg.h
@@ -26,7 +26,8 @@
#define LEGACY_FREE 1
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -195,7 +196,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
diff --git a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h
index bbd1d14..2d946f8 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h
+++ b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h
@@ -23,7 +23,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -192,7 +193,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
diff --git a/src/mainboard/lippert/frontrunner-af/platform_cfg.h b/src/mainboard/lippert/frontrunner-af/platform_cfg.h
index 03146d0..0c3308d 100644
--- a/src/mainboard/lippert/frontrunner-af/platform_cfg.h
+++ b/src/mainboard/lippert/frontrunner-af/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -190,7 +191,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
diff --git a/src/mainboard/lippert/toucan-af/platform_cfg.h b/src/mainboard/lippert/toucan-af/platform_cfg.h
index 25b0485..29f3916 100644
--- a/src/mainboard/lippert/toucan-af/platform_cfg.h
+++ b/src/mainboard/lippert/toucan-af/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -190,7 +191,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
More information about the coreboot-gerrit
mailing list