[coreboot-gerrit] Patch merged into coreboot/master: 41a5d0d ipq8064: add SOC initialization skeleton
gerrit at coreboot.org
gerrit at coreboot.org
Sat Jan 3 04:59:52 CET 2015
the following patch was just integrated into master:
commit 41a5d0df58754b75cfe5c79271ae383f3d5976c1
Author: Vadim Bendebury <vbendeb at chromium.org>
Date: Tue May 13 17:47:57 2014 -0700
ipq8064: add SOC initialization skeleton
The main benefit of adding this skeleton is the addition of the
correct memory map to CBMEM. Attempts to load depthcharge do not fail
because of unavailability of the bounce buffer.
BUG=chrome-os-partner:27784
TEST=boot updated firmware on AP148, observe
CPU: Qualcomm 8064
in the ramstage console output as well as not failing to load
depthcharge any more.
Original-Change-Id: I56c1fa34ce3967852be6eaa0de6e823e64c3ede8
Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/199675
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
(cherry picked from commit a8fdbdd268a2bba1405d585881eb95510ad17a2a)
Signed-off-by: Marc Jones <marc.jones at se-eng.com>
Change-Id: I7b982f222ac3b93371fe77961f18719c5d269013
Reviewed-on: http://review.coreboot.org/8000
Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Tested-by: build bot (Jenkins)
See http://review.coreboot.org/8000 for details.
-gerrit
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