[coreboot-gerrit] New patch to review for coreboot: f9268b2 samus: Enable DDI2 hotplug

[Marc Jones (marc.jones@se-eng.com)]

Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8046

-gerrit

commit f9268b23c63c60dd4e581d2622af31268b8e820d
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Mon Jun 2 08:36:38 2014 -0700

    samus: Enable DDI2 hotplug
    
    Both DDI ports may be used on this board so it needs to be
    able to detect a device on either port.
    
    BUG=chrome-os-partner:28234
    TEST=None (needs hardware)
    
    Original-Change-Id: I5fc5ec3fe887fb51e7bdeae43c8297580e0ba6d6
    Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/202358
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    (cherry picked from commit 574bb6ac5d33c98f0214d6c738af24172164f4a1)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: I57613fcea10af0fecaf0f2ad6a83ca011c650099
---
 src/mainboard/google/samus/devicetree.cb | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/mainboard/google/samus/devicetree.cb b/src/mainboard/google/samus/devicetree.cb
index 8810c47..ce13a1d 100644
--- a/src/mainboard/google/samus/devicetree.cb
+++ b/src/mainboard/google/samus/devicetree.cb
@@ -3,12 +3,12 @@ chip soc/intel/broadwell
 	# Enable eDP Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
 
-	# Disable DDI2 Hotplug
-	register "gpu_dp_c_hotplug" = "0x00"
-
 	# Enable DDI1 Hotplug with 6ms pulse
 	register "gpu_dp_b_hotplug" = "0x06"
 
+	# Enable DDI2 Hotplug with 6ms pulse
+	register "gpu_dp_c_hotplug" = "0x06"
+
 	# Set backlight PWM values for eDP
 	register "gpu_cpu_backlight" = "0x00000200"
 	register "gpu_pch_backlight" = "0x04000000"