[coreboot-gerrit] Patch set updated for coreboot: soc/imgtec/pistacchio: Implement hard_reset()
Stefan Reinauer (stefan.reinauer@coreboot.org)
gerrit at coreboot.org
Wed Dec 16 00:39:42 CET 2015
Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12723
-gerrit
commit d71a3fc6bad3b8675a3555505251194d550b972f
Author: Stefan Reinauer <stefan.reinauer at coreboot.org>
Date: Mon Dec 14 17:31:44 2015 -0800
soc/imgtec/pistacchio: Implement hard_reset()
Verified boot needs hard_reset() now, so offer a dummy implementation
for the Imagination chip. Sorry, I don't have the specs for this chip
anymore to make a real implementation, but I would like to keep this
code from bit rotting.
Change-Id: I15aa47f7d248b99901a2ac0e65a46b43d7718717
Signed-off-by: Stefan Reinauer <stefan.reinauer at coreboot.org>
---
src/soc/imgtec/pistachio/Kconfig | 1 +
src/soc/imgtec/pistachio/Makefile.inc | 1 +
src/soc/imgtec/pistachio/reset.c | 25 +++++++++++++++++++++++++
3 files changed, 27 insertions(+)
diff --git a/src/soc/imgtec/pistachio/Kconfig b/src/soc/imgtec/pistachio/Kconfig
index e26130b..2e28174 100644
--- a/src/soc/imgtec/pistachio/Kconfig
+++ b/src/soc/imgtec/pistachio/Kconfig
@@ -21,6 +21,7 @@ config CPU_IMGTEC_PISTACHIO
select HAVE_UART_SPECIAL
select SPI_ATOMIC_SEQUENCING
select GENERIC_GPIO_LIB
+ select HAVE_HARD_RESET
bool
if CPU_IMGTEC_PISTACHIO
diff --git a/src/soc/imgtec/pistachio/Makefile.inc b/src/soc/imgtec/pistachio/Makefile.inc
index 1a5e2af..78e7789 100644
--- a/src/soc/imgtec/pistachio/Makefile.inc
+++ b/src/soc/imgtec/pistachio/Makefile.inc
@@ -33,6 +33,7 @@ bootblock-y += monotonic_timer.c
ramstage-y += cbmem.c
ramstage-y += monotonic_timer.c
ramstage-y += soc.c
+ramstage-y += reset.c
romstage-y += cbmem.c
romstage-y += ddr2_init.c
diff --git a/src/soc/imgtec/pistachio/reset.c b/src/soc/imgtec/pistachio/reset.c
new file mode 100644
index 0000000..7bf4d03
--- /dev/null
+++ b/src/soc/imgtec/pistachio/reset.c
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <reset.h>
+
+void hard_reset(void)
+{
+ printk(BIOS_EMERG, "reset failed!\n");
+ /* TBD */
+ for (;;)
+ ;
+}
More information about the coreboot-gerrit
mailing list