[coreboot-gerrit] New patch to review for coreboot: intel/littleplains: Update with recent changes to mohonpeak
Martin Roth (martinroth@google.com)
gerrit at coreboot.org
Thu Dec 3 22:02:30 CET 2015
Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12635
-gerrit
commit 9d85a0d4707ed1b2db15a89b5d34b4a0fa725550
Author: Martin Roth <martinroth at google.com>
Date: Thu Dec 3 14:02:16 2015 -0700
intel/littleplains: Update with recent changes to mohonpeak
- Change SEABIOS_MALLOC_UPPERMEMORY to using PAYLOAD_CONFIGFILE.
- Add saved seabios .config with CONFIG_MALLOC_UPPERMEMORY unset.
- Remove fixed microcode location.
Change-Id: I8b723edf6d6b5542f118e9e0e1aee8104d9cde86
Signed-off-by: Martin Roth <martinroth at google.com>
---
src/mainboard/intel/littleplains/Kconfig | 12 ++++--------
src/mainboard/intel/littleplains/config_seabios | 5 +++++
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/src/mainboard/intel/littleplains/Kconfig b/src/mainboard/intel/littleplains/Kconfig
index 2fc5cb1..55a4757 100644
--- a/src/mainboard/intel/littleplains/Kconfig
+++ b/src/mainboard/intel/littleplains/Kconfig
@@ -58,16 +58,12 @@ config UART_FOR_CONSOLE
help
The Little Plains board uses COM2 (2f8) for the serial console.
-config SEABIOS_MALLOC_UPPERMEMORY
- bool
- default n
- help
+ config PAYLOAD_CONFIGFILE
+ string
+ default "$(top)/src/mainboard/$(MAINBOARDDIR)/config_seabios"
+ help
The Avoton/Rangeley chip does not allow devices to write into the 0xe000
segment. This means that USB/SATA devices will not work in SeaBIOS unless
we put the SeaBIOS buffer area down in the 0x9000 segment.
-config CPU_MICROCODE_CBFS_LOC
- hex
- default 0xfff60040
-
endif # BOARD_INTEL_LITTLEPLAINS
diff --git a/src/mainboard/intel/littleplains/config_seabios b/src/mainboard/intel/littleplains/config_seabios
new file mode 100644
index 0000000..f688f2b
--- /dev/null
+++ b/src/mainboard/intel/littleplains/config_seabios
@@ -0,0 +1,5 @@
+# The Avoton/Rangeley chip does not allow devices to write into the 0xe000
+# segment. This means that USB/SATA devices will not work in SeaBIOS unless
+# we put the SeaBIOS buffer area down in the 0x9000 segment.
+
+# CONFIG_MALLOC_UPPERMEMORY is not set
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