[coreboot-gerrit] Patch merged into coreboot/master: skylake: FAB3 Adding Support for various SPD.
gerrit at coreboot.org
gerrit at coreboot.org
Thu Aug 27 16:19:44 CEST 2015
the following patch was just integrated into master:
commit 415022a86c1033e7b233fc2ca16e1d6367425ab5
Author: pchandri <preetham.chandrian at intel.com>
Date: Fri Aug 14 12:18:31 2015 -0700
skylake: FAB3 Adding Support for various SPD.
This pach enables memory configuration based on PCH_MEM_CFG
and EC_BRD_ID.
BRANCH=None
BUG=chrome-os-partner:44087
CQ-DEPEND=CL:293832
TEST=Build and Boot FAB3 (Kunimitsu)
Original-Change-Id: I7999e609c4b0b3c89a9689ee6bb6b98c88703809
Original-Signed-off-by: pchandri <preetham.chandrian at intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/293787
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Change-Id: I52a1af1683b74e5cad71b9e4861942a23869f255
Signed-off-by: pchandri <preetham.chandrian at intel.com>
Reviewed-on: http://review.coreboot.org/11284
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth at google.com>
See http://review.coreboot.org/11284 for details.
-gerrit
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