[coreboot-gerrit] Patch merged into coreboot/master: ifdtool: Update to support Skylake+ descriptor format

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 1f7fd720c81755144423f2d4062c39cc651adc0a
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Mon Jun 22 11:14:48 2015 -0700

    ifdtool: Update to support Skylake+ descriptor format
    
    The descriptor format has changed with Skylake and some fields have
    moved or been expanded.
    
    This includes new SPI frequencies and chip densities, though unfortunately
    30MHz in the new format conflicts with 50MHz in the old format...
    
    There are also new regions with a few reserved regions inserted before
    a new embedded controller region.
    
    Unfortunately there does not seem to be a documented version field
    so there does not seem to be an official way to determine if a
    specific descriptor is new or old.  To work around this ifdtool
    checks the hardcoded "SPI Read Frequency" to see if it set for
    20MHz (old descriptor) or 17MHz (new descriptor).
    
    BUG=chrome-os-partner:40635
    BUG=chrome-os-partner:43461
    BRANCH=none
    TEST=run ifdtool on skylake and broadwell images
    
    Original-Change-Id: I0561b3c65fcb3e77c0a24be58b01db9b3a36e5a9
    Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/281001
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Commit-Queue: Aaron Durbin <adurbin at chromium.org>
    
    Change-Id: I9a08c26432e13c4000afc50de9d8473e6f911805
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://chromium-review.googlesource.com/293240
    Reviewed-on: http://review.coreboot.org/11228
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/11228 for details.

-gerrit