[coreboot-gerrit] Patch merged into coreboot/master: skylake: Add Deep Sx configuration for wake pins

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit edf1cb78e29edd768ef9641093bb3eae3c8c91d7
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Fri Jul 24 15:37:13 2015 -0700

    skylake: Add Deep Sx configuration for wake pins
    
    Add support for enabling various pins in Deep Sx by setting
    a register in the mainboard devicetree.
    
    BUG=chrome-os-partner:43079
    BRANCH=none
    TEST=build and boot on glados
    
    Original-Change-Id: I1b4fb51f72b88bdc49096268bdd781750dcd089d
    Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/288920
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    
    Change-Id: I7555a92fecc6e78b579ec0bc18da202cb0c824e2
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: http://review.coreboot.org/11170
    Tested-by: build bot (Jenkins)
    Reviewed-by: Patrick Georgi <pgeorgi at google.com>


See http://review.coreboot.org/11170 for details.

-gerrit