[coreboot-gerrit] New patch to review for coreboot: 6ea7519 marvell/bg4cd: merge verstage into bootblock
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Mon Apr 27 18:23:28 CEST 2015
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10008
-gerrit
commit 6ea751910631e604f92d0d15f94b5c9fff5d568a
Author: Daisuke Nojiri <dnojiri at chromium.org>
Date: Wed Dec 3 12:09:58 2014 -0800
marvell/bg4cd: merge verstage into bootblock
If verified boot is enabled, merge verstage into bootblock. This also
requires custom bootblock code to actually call into verstage.
[pg: modified to match upstream]
BUG=chrome-os-partner:32631
BRANCH=ToT
TEST=booted on cosmos development board.
Change-Id: I53251aac966ee15da24232c23fefa636de8b253b
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: 2b8ada263017b46afa755b5acb759574184dba06
Original-Signed-off-by: Daisuke Nojiri <dnojiri at chromium.org>
Original-Change-Id: Ia0e1236357aa32bf553fb8cc98f3a8d29de17f45
Original-Reviewed-on: https://chromium-review.googlesource.com/229795
Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
---
src/mainboard/google/cosmos/Kconfig | 1 -
src/soc/marvell/bg4cd/Kconfig | 2 +
src/soc/marvell/bg4cd/Makefile.inc | 3 ++
src/soc/marvell/bg4cd/bootblock.c | 27 +++++++++++++
src/soc/marvell/bg4cd/bootblock_asm.S | 54 ++++++++++++++++++++++++++
src/soc/marvell/bg4cd/include/soc/memlayout.ld | 30 ++++++++------
6 files changed, 104 insertions(+), 13 deletions(-)
diff --git a/src/mainboard/google/cosmos/Kconfig b/src/mainboard/google/cosmos/Kconfig
index 49d3172..8cd9983 100644
--- a/src/mainboard/google/cosmos/Kconfig
+++ b/src/mainboard/google/cosmos/Kconfig
@@ -28,7 +28,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_HARD_RESET
select MAINBOARD_HAS_BOOTBLOCK_INIT
select MAINBOARD_HAS_CHROMEOS
- select RETURN_FROM_VERSTAGE
select SOC_MARVELL_BG4CD
select SPI_FLASH
select SPI_FLASH_SPANSION
diff --git a/src/soc/marvell/bg4cd/Kconfig b/src/soc/marvell/bg4cd/Kconfig
index b1fabb7..725f561 100644
--- a/src/soc/marvell/bg4cd/Kconfig
+++ b/src/soc/marvell/bg4cd/Kconfig
@@ -24,6 +24,7 @@ config SOC_MARVELL_BG4CD
select ARCH_RAMSTAGE_ARMV7
select ARCH_ROMSTAGE_ARMV7
select ARCH_VERSTAGE_ARMV7_M
+ select ARM_BOOTBLOCK_CUSTOM if VBOOT2_VERIFY_FIRMWARE
select BOOTBLOCK_CONSOLE
select CPU_HAS_BOOTBLOCK_INIT
select DYNAMIC_CBMEM
@@ -31,6 +32,7 @@ config SOC_MARVELL_BG4CD
select GENERIC_UDELAY
select HAVE_MONOTONIC_TIMER
select GENERIC_GPIO_LIB
+ select VERSTAGE_IN_BOOTBLOCK
if SOC_MARVELL_BG4CD
diff --git a/src/soc/marvell/bg4cd/Makefile.inc b/src/soc/marvell/bg4cd/Makefile.inc
index 4cbca00..a540250 100644
--- a/src/soc/marvell/bg4cd/Makefile.inc
+++ b/src/soc/marvell/bg4cd/Makefile.inc
@@ -17,6 +17,9 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
+bootblock-$(CONFIG_VBOOT2_VERIFY_FIRMWARE) += bootblock_asm.S
+bootblock-$(CONFIG_VBOOT2_VERIFY_FIRMWARE) += bootblock.c
+
bootblock-y += cbmem.c
bootblock-y += i2c.c
bootblock-y += monotonic_timer.c
diff --git a/src/soc/marvell/bg4cd/bootblock.c b/src/soc/marvell/bg4cd/bootblock.c
new file mode 100644
index 0000000..4913a1c
--- /dev/null
+++ b/src/soc/marvell/bg4cd/bootblock.c
@@ -0,0 +1,27 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <console/console.h>
+#include <vendorcode/google/chromeos/chromeos.h>
+
+void main(void)
+{
+ console_init();
+ vboot2_verify_firmware();
+}
diff --git a/src/soc/marvell/bg4cd/bootblock_asm.S b/src/soc/marvell/bg4cd/bootblock_asm.S
new file mode 100644
index 0000000..73ca46b
--- /dev/null
+++ b/src/soc/marvell/bg4cd/bootblock_asm.S
@@ -0,0 +1,54 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <arch/asm.h>
+
+ENTRY(_start)
+ /*
+ * Initialize the stack to a known value. This is used to check for
+ * stack overflow later in the boot process.
+ */
+ ldr r0, =_stack
+ ldr r1, =_estack
+ ldr r2, =0xdeadbeef
+init_stack_loop:
+ str r2, [r0]
+ add r0, #4
+ cmp r0, r1
+ bne init_stack_loop
+
+call_verstage:
+ ldr sp, =_estack /* Set up stack pointer */
+ /*
+ * we don't bl here to preserve lr so that we can return to the caller
+ * of the bootblock
+ */
+ b main
+ENDPROC(_start)
diff --git a/src/soc/marvell/bg4cd/include/soc/memlayout.ld b/src/soc/marvell/bg4cd/include/soc/memlayout.ld
index 45cf395..d6244b3 100644
--- a/src/soc/marvell/bg4cd/include/soc/memlayout.ld
+++ b/src/soc/marvell/bg4cd/include/soc/memlayout.ld
@@ -24,16 +24,22 @@
SECTIONS
{
- DRAM_START(0x00000000)
- RAMSTAGE(0x00200000, 128K)
- POSTRAM_CBFS_CACHE(0x01000000, 1M)
-
- SRAM_START(0x80000000)
- TTB(0x80000000, 16K)
- BOOTBLOCK(0x80004004, 16K - 4)
- VBOOT2_WORK(0x80008000, 16K)
- OVERLAP_VERSTAGE_ROMSTAGE(0x8000C000, 40K)
- PRERAM_CBFS_CACHE(0x80016000, 4K)
- STACK(0x80017000, 4K)
- SRAM_END(0x80018000)
+ SRAM_START(0x20000)
+
+ BOOTBLOCK(0x20000, 40K)
+ /* there is no VERSTAGE because it's built into bootblock */
+
+ PRERAM_CBFS_CACHE(0x2A000, 8K)
+ STACK(0x2C000, 8K)
+ VBOOT2_WORK(0x2E000, 16K)
+
+ SRAM_END(0x40000)
+
+ DRAM_START(0x40000)
+
+ RAMSTAGE(0x40000, 128K)
+ POSTRAM_CBFS_CACHE(0x60000, 1M)
+
+ ROMSTAGE(0xF7A40000, 32K)
+ TTB(0xF7A48000, 16K)
}
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