[coreboot-gerrit] New patch to review for coreboot: 6e975d0 i945/raminit.c: fix write Cache Control

[HAOUAS Elyes (ehaouas@noos.fr)]

HAOUAS Elyes (ehaouas at noos.fr) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9971

-gerrit

commit 6e975d043b6032a29cf09bb9aa18b3f15f8891a2
Author: Elyes HAOUAS <ehaouas at noos.fr>
Date:   Thu Apr 23 12:10:17 2015 +0200

    i945/raminit.c: fix write Cache Control
    
    Change-Id: I97401a39a958a17f2f9120539362e3fa7819a742
    Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
 src/northbridge/intel/i945/raminit.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index bd6e0c9..0f1741a 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -2326,8 +2326,8 @@ static void sdram_pre_jedec_initialization(void)
 	u32 reg32;
 
 	reg32 = MCHBAR32(WCC);
-	reg32 &= 0x113ff3ff;
-	reg32 |= (4 << 29) | (3 << 25) | (1 << 10);
+	reg32 &= 0xf3fff7ff;
+	reg32 |= (1 << 25) | (3 << 22) | (1 << 10);
 	MCHBAR32(WCC) = reg32;
 
 	MCHBAR32(SMVREFC) |= (1 << 6);