[coreboot-gerrit] Patch merged into coreboot/master: ee426cf google/veyron_*: Increase SPI flash frequency to 24.75MHz

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit ee426cf54eea43b8fb5194abe948f8e00d4f4b4c
Author: Julius Werner <jwerner at chromium.org>
Date:   Tue Mar 24 16:54:38 2015 -0700

    google/veyron_*: Increase SPI flash frequency to 24.75MHz
    
    This patch increases the SPI clock for the ROM to 24.75MHz on all rk3288
    (veyron) boards. This increases flash read speeds (and thereby decreases
    boot time) significantly, but we don't seem to get any more increases by
    going even higher. We have also seen occasional read failures at higher
    speeds in certain configurations, so this frequency seems to be the best
    option.
    
    BRANCH=veyron
    BUG=chrome-os-partner:38352
    TEST=Booted on Jerry with Servo attached.
    
    Change-Id: I9bdb62eff169fe2be33558caafe9891668589372
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: a1d07da4266f2922b076dfae8396c24c6a84252b
    Original-Change-Id: If3fd96c8cb5648d12fc4ee56fb6b6d5f3a0bf720
    Original-Signed-off-by: Julius Werner <jwerner at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/262645
    Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
    Reviewed-on: http://review.coreboot.org/9889
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/9889 for details.

-gerrit