[coreboot-gerrit] New patch to review for coreboot: d960f0e chromeec: Update ec_commands.h from EC repository
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Tue Apr 21 10:45:09 CEST 2015
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9885
-gerrit
commit d960f0e73a45fd3b2836e1dcab0db9d7fb785fab
Author: Shawn Nematbakhsh <shawnn at chromium.org>
Date: Tue Mar 24 11:47:18 2015 -0700
chromeec: Update ec_commands.h from EC repository
BUG=chrome-os-partner:38224
TEST=Compile for Samus
BRANCH=None
Change-Id: I9bb7ed100b876cbd50d39f5c5ad599e4bd7be6b4
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: ca8fbf8ed91d95486f0c8db680e8ceabca597a3a
Original-Change-Id: I250fcce67f6103cf3037b416b8e74dd4a2cea780
Original-Signed-off-by: Shawn Nematbakhsh <shawnn at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/262313
Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
---
src/ec/google/chromeec/ec_commands.h | 692 ++++++++++++++++++++++++++---------
1 file changed, 524 insertions(+), 168 deletions(-)
diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h
index 725a652..d4c0bc4 100644
--- a/src/ec/google/chromeec/ec_commands.h
+++ b/src/ec/google/chromeec/ec_commands.h
@@ -92,8 +92,14 @@
/* Unused 0x91 */
#define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometer data 0x92 - 0x9f */
#define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */
-/* Unused 0xa6 - 0xfe (remember, 0xff is NOT part of the memmap region) */
+/* Unused 0xa6 - 0xdf */
+/*
+ * ACPI is unable to access memory mapped data at or above this offset due to
+ * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe
+ * which might be needed by ACPI.
+ */
+#define EC_MEMMAP_NO_ACPI 0xe0
/* Define the format of the accelerometer mapped memory status byte. */
#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f
@@ -167,6 +173,146 @@
#define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */
#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */
+/*****************************************************************************/
+/*
+ * ACPI commands
+ *
+ * These are valid ONLY on the ACPI command/data port.
+ */
+
+/*
+ * ACPI Read Embedded Controller
+ *
+ * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
+ *
+ * Use the following sequence:
+ *
+ * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
+ * - Wait for EC_LPC_CMDR_PENDING bit to clear
+ * - Write address to EC_LPC_ADDR_ACPI_DATA
+ * - Wait for EC_LPC_CMDR_DATA bit to set
+ * - Read value from EC_LPC_ADDR_ACPI_DATA
+ */
+#define EC_CMD_ACPI_READ 0x80
+
+/*
+ * ACPI Write Embedded Controller
+ *
+ * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
+ *
+ * Use the following sequence:
+ *
+ * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
+ * - Wait for EC_LPC_CMDR_PENDING bit to clear
+ * - Write address to EC_LPC_ADDR_ACPI_DATA
+ * - Wait for EC_LPC_CMDR_PENDING bit to clear
+ * - Write value to EC_LPC_ADDR_ACPI_DATA
+ */
+#define EC_CMD_ACPI_WRITE 0x81
+
+/*
+ * ACPI Burst Enable Embedded Controller
+ *
+ * This enables burst mode on the EC to allow the host to issue several
+ * commands back-to-back. While in this mode, writes to mapped multi-byte
+ * data are locked out to ensure data consistency.
+ */
+#define EC_CMD_ACPI_BURST_ENABLE 0x82
+
+/*
+ * ACPI Burst Disable Embedded Controller
+ *
+ * This disables burst mode on the EC and stops preventing EC writes to mapped
+ * multi-byte data.
+ */
+#define EC_CMD_ACPI_BURST_DISABLE 0x83
+
+/*
+ * ACPI Query Embedded Controller
+ *
+ * This clears the lowest-order bit in the currently pending host events, and
+ * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
+ * event 0x80000000 = 32), or 0 if no event was pending.
+ */
+#define EC_CMD_ACPI_QUERY_EVENT 0x84
+
+/* Valid addresses in ACPI memory space, for read/write commands */
+
+/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
+#define EC_ACPI_MEM_VERSION 0x00
+/*
+ * Test location; writing value here updates test compliment byte to (0xff -
+ * value).
+ */
+#define EC_ACPI_MEM_TEST 0x01
+/* Test compliment; writes here are ignored. */
+#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
+
+/* Keyboard backlight brightness percent (0 - 100) */
+#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
+/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
+#define EC_ACPI_MEM_FAN_DUTY 0x04
+
+/*
+ * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
+ * independent thresholds attached to them. The current value of the ID
+ * register determines which sensor is affected by the THRESHOLD and COMMIT
+ * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
+ * as the memory-mapped sensors. The COMMIT register applies those settings.
+ *
+ * The spec does not mandate any way to read back the threshold settings
+ * themselves, but when a threshold is crossed the AP needs a way to determine
+ * which sensor(s) are responsible. Each reading of the ID register clears and
+ * returns one sensor ID that has crossed one of its threshold (in either
+ * direction) since the last read. A value of 0xFF means "no new thresholds
+ * have tripped". Setting or enabling the thresholds for a sensor will clear
+ * the unread event count for that sensor.
+ */
+#define EC_ACPI_MEM_TEMP_ID 0x05
+#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
+#define EC_ACPI_MEM_TEMP_COMMIT 0x07
+/*
+ * Here are the bits for the COMMIT register:
+ * bit 0 selects the threshold index for the chosen sensor (0/1)
+ * bit 1 enables/disables the selected threshold (0 = off, 1 = on)
+ * Each write to the commit register affects one threshold.
+ */
+#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0)
+#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1)
+/*
+ * Example:
+ *
+ * Set the thresholds for sensor 2 to 50 C and 60 C:
+ * write 2 to [0x05] -- select temp sensor 2
+ * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
+ * write 0x2 to [0x07] -- enable threshold 0 with this value
+ * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
+ * write 0x3 to [0x07] -- enable threshold 1 with this value
+ *
+ * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
+ * write 2 to [0x05] -- select temp sensor 2
+ * write 0x1 to [0x07] -- disable threshold 1
+ */
+
+/* DPTF battery charging current limit */
+#define EC_ACPI_MEM_CHARGING_LIMIT 0x08
+
+/* Charging limit is specified in 64 mA steps */
+#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
+/* Value to disable DPTF battery charging limit */
+#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
+
+/*
+ * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data
+ * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2.
+ */
+#define EC_ACPI_MEM_MAPPED_BEGIN 0x20
+#define EC_ACPI_MEM_MAPPED_SIZE 0xe0
+
+/* Current version of ACPI memory address space */
+#define EC_ACPI_MEM_VERSION_CURRENT 2
+
+
/*
* This header file is used in coreboot both in C and ACPI code. The ACPI code
* is pre-processed to handle constants but the ASL compiler is unable to
@@ -191,7 +337,7 @@
#define EC_LPC_STATUS_PROCESSING 0x04
/* Last write to EC was a command, not data */
#define EC_LPC_STATUS_LAST_CMD 0x08
-/* EC is in burst mode. Unsupported by Chrome EC, so this bit is never set */
+/* EC is in burst mode */
#define EC_LPC_STATUS_BURST_MODE 0x10
/* SCI event is pending (requesting SCI query) */
#define EC_LPC_STATUS_SCI_PENDING 0x20
@@ -224,7 +370,8 @@ enum ec_status {
EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */
EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */
EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */
- EC_RES_BUS_ERROR = 15 /* Communications bus error */
+ EC_RES_BUS_ERROR = 15, /* Communications bus error */
+ EC_RES_BUSY = 16 /* Up but too busy. Should retry */
};
/*
@@ -278,7 +425,7 @@ enum host_event_code {
/* Battery Status flags have changed */
EC_HOST_EVENT_BATTERY_STATUS = 23,
- /* EC encountered a panic, triggering an reset */
+ /* EC encountered a panic, triggering a reset */
EC_HOST_EVENT_PANIC = 24,
/*
@@ -620,6 +767,10 @@ struct ec_params_get_cmd_versions {
uint8_t cmd; /* Command to check */
} __packed;
+struct ec_params_get_cmd_versions_v1 {
+ uint16_t cmd; /* Command to check */
+} __packed;
+
struct ec_response_get_cmd_versions {
/*
* Mask of supported versions; use EC_VER_MASK() to compare with a
@@ -833,7 +984,7 @@ struct ec_params_flash_erase {
* re-requesting the desired flags, or by a hard reset if that fails.
*/
#define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5)
-/* Entile flash code protected when the EC boots */
+/* Entire flash code protected when the EC boots */
#define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6)
struct ec_params_flash_protect {
@@ -918,10 +1069,17 @@ struct ec_response_pwm_get_fan_rpm {
/* Set target fan RPM */
#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x21
-struct ec_params_pwm_set_fan_target_rpm {
+/* Version 0 of input params */
+struct ec_params_pwm_set_fan_target_rpm_v0 {
uint32_t rpm;
} __packed;
+/* Version 1 of input params */
+struct ec_params_pwm_set_fan_target_rpm_v1 {
+ uint32_t rpm;
+ uint8_t fan_idx;
+} __packed;
+
/* Get keyboard backlight */
#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x22
@@ -940,8 +1098,15 @@ struct ec_params_pwm_set_keyboard_backlight {
/* Set target fan PWM duty cycle */
#define EC_CMD_PWM_SET_FAN_DUTY 0x24
-struct ec_params_pwm_set_fan_duty {
+/* Version 0 of input params */
+struct ec_params_pwm_set_fan_duty_v0 {
+ uint32_t percent;
+} __packed;
+
+/* Version 1 of input params */
+struct ec_params_pwm_set_fan_duty_v1 {
uint32_t percent;
+ uint8_t fan_idx;
} __packed;
/*****************************************************************************/
@@ -1006,7 +1171,10 @@ struct lightbar_params_v1 {
int32_t s3_sleep_for;
int32_t s3_ramp_up;
int32_t s3_ramp_down;
+ int32_t s5_ramp_up;
+ int32_t s5_ramp_down;
int32_t tap_tick_delay;
+ int32_t tap_gate_delay;
int32_t tap_display_time;
/* Tap-for-battery params */
@@ -1034,15 +1202,18 @@ struct lightbar_params_v1 {
uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
+ /* s5: single color pulse on inhibited power-up */
+ uint8_t s5_idx;
+
/* Color palette */
struct rgb_s color[8]; /* 0-3 are Google colors */
} __packed;
/* Lightbyte program. */
-#define LB_PROG_LEN 192
-struct lb_program {
+#define EC_LB_PROG_LEN 192
+struct lightbar_program {
uint8_t size;
- uint8_t data[LB_PROG_LEN];
+ uint8_t data[EC_LB_PROG_LEN];
};
struct ec_params_lightbar {
@@ -1051,7 +1222,7 @@ struct ec_params_lightbar {
struct {
/* no args */
} dump, off, on, init, get_seq, get_params_v0, get_params_v1,
- version, get_brightness, get_demo;
+ version, get_brightness, get_demo, suspend, resume;
struct {
uint8_t num;
@@ -1069,9 +1240,13 @@ struct ec_params_lightbar {
uint8_t led;
} get_rgb;
+ struct {
+ uint8_t enable;
+ } manual_suspend_ctrl;
+
struct lightbar_params_v0 set_params_v0;
struct lightbar_params_v1 set_params_v1;
- struct lb_program set_program;
+ struct lightbar_program set_program;
};
} __packed;
@@ -1105,7 +1280,7 @@ struct ec_response_lightbar {
/* no return params */
} off, on, init, set_brightness, seq, reg, set_rgb,
demo, set_params_v0, set_params_v1,
- set_program;
+ set_program, manual_suspend_ctrl, suspend, resume;
};
} __packed;
@@ -1130,6 +1305,9 @@ enum lightbar_command {
LIGHTBAR_CMD_GET_PARAMS_V1 = 16,
LIGHTBAR_CMD_SET_PARAMS_V1 = 17,
LIGHTBAR_CMD_SET_PROGRAM = 18,
+ LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19,
+ LIGHTBAR_CMD_SUSPEND = 20,
+ LIGHTBAR_CMD_RESUME = 21,
LIGHTBAR_NUM_CMDS
};
@@ -1293,18 +1471,6 @@ enum motionsense_command {
MOTIONSENSE_NUM_CMDS
};
-enum motionsensor_id {
- EC_MOTION_SENSOR_ACCEL_BASE = 0,
- EC_MOTION_SENSOR_ACCEL_LID = 1,
- EC_MOTION_SENSOR_GYRO = 2,
-
- /*
- * Note, if more sensors are added and this count changes, the padding
- * in ec_response_motion_sense dump command must be modified.
- */
- EC_MOTION_SENSOR_COUNT = 3
-};
-
/* List of motion sensor types. */
enum motionsensor_type {
MOTIONSENSE_TYPE_ACCEL = 0,
@@ -1339,9 +1505,14 @@ enum motionsensor_chip {
struct ec_params_motion_sense {
uint8_t cmd;
union {
- /* Used for MOTIONSENSE_CMD_DUMP. */
+ /* Used for MOTIONSENSE_CMD_DUMP */
struct {
- /* no args */
+ /*
+ * Maximal number of sensor the host is expecting.
+ * 0 means the host is only interested in the number
+ * of sensors controlled by the EC.
+ */
+ uint8_t max_sensor_count;
} dump;
/*
@@ -1355,7 +1526,6 @@ struct ec_params_motion_sense {
/* Used for MOTIONSENSE_CMD_INFO. */
struct {
- /* Should be element of enum motionsensor_id. */
uint8_t sensor_num;
} info;
@@ -1364,7 +1534,6 @@ struct ec_params_motion_sense {
* MOTIONSENSE_CMD_SENSOR_RANGE.
*/
struct {
- /* Should be element of enum motionsensor_id. */
uint8_t sensor_num;
/* Rounding flag, true for round-up, false for down. */
@@ -1378,18 +1547,30 @@ struct ec_params_motion_sense {
};
} __packed;
+struct ec_response_motion_sensor_data {
+ /* Flags for each sensor. */
+ uint8_t flags;
+ uint8_t padding;
+
+ /* Each sensor is up to 3-axis. */
+ int16_t data[3];
+} __packed;
+
struct ec_response_motion_sense {
union {
- /* Used for MOTIONSENSE_CMD_DUMP. */
+ /* Used for MOTIONSENSE_CMD_DUMP */
struct {
/* Flags representing the motion sensor module. */
uint8_t module_flags;
- /* Flags for each sensor in enum motionsensor_id. */
- uint8_t sensor_flags[EC_MOTION_SENSOR_COUNT];
+ /* Number of sensors managed directly by the EC */
+ uint8_t sensor_count;
- /* Array of all sensor data. Each sensor is 3-axis. */
- int16_t data[3*EC_MOTION_SENSOR_COUNT];
+ /*
+ * sensor data is truncated if response_max is too small
+ * for holding all the data.
+ */
+ struct ec_response_motion_sensor_data sensor[0];
} dump;
/* Used for MOTIONSENSE_CMD_INFO. */
@@ -1417,6 +1598,16 @@ struct ec_response_motion_sense {
} __packed;
/*****************************************************************************/
+/* Force lid open command */
+
+/* Make lid event always open */
+#define EC_CMD_FORCE_LID_OPEN 0x2c
+
+struct ec_params_force_lid_open {
+ uint8_t enabled;
+} __packed;
+
+/*****************************************************************************/
/* USB charging control commands */
/* Set USB port charging mode */
@@ -1595,32 +1786,63 @@ struct ec_params_thermal_set_threshold_v1 {
/* Toggle automatic fan control */
#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x52
-/* Get TMP006 calibration data */
+/* Version 1 of input params */
+struct ec_params_auto_fan_ctrl_v1 {
+ uint8_t fan_idx;
+} __packed;
+
+/* Get/Set TMP006 calibration data */
#define EC_CMD_TMP006_GET_CALIBRATION 0x53
+#define EC_CMD_TMP006_SET_CALIBRATION 0x54
+
+/*
+ * The original TMP006 calibration only needed four params, but now we need
+ * more. Since the algorithm is nothing but magic numbers anyway, we'll leave
+ * the params opaque. The v1 "get" response will include the algorithm number
+ * and how many params it requires. That way we can change the EC code without
+ * needing to update this file. We can also use a different algorithm on each
+ * sensor.
+ */
+/* This is the same struct for both v0 and v1. */
struct ec_params_tmp006_get_calibration {
uint8_t index;
} __packed;
-struct ec_response_tmp006_get_calibration {
+/* Version 0 */
+struct ec_response_tmp006_get_calibration_v0 {
float s0;
float b0;
float b1;
float b2;
} __packed;
-/* Set TMP006 calibration data */
-#define EC_CMD_TMP006_SET_CALIBRATION 0x54
-
-struct ec_params_tmp006_set_calibration {
+struct ec_params_tmp006_set_calibration_v0 {
uint8_t index;
- uint8_t reserved[3]; /* Reserved; set 0 */
+ uint8_t reserved[3];
float s0;
float b0;
float b1;
float b2;
} __packed;
+/* Version 1 */
+struct ec_response_tmp006_get_calibration_v1 {
+ uint8_t algorithm;
+ uint8_t num_params;
+ uint8_t reserved[2];
+ float val[0];
+} __packed;
+
+struct ec_params_tmp006_set_calibration_v1 {
+ uint8_t index;
+ uint8_t algorithm;
+ uint8_t num_params;
+ uint8_t reserved;
+ float val[0];
+} __packed;
+
+
/* Read raw TMP006 data */
#define EC_CMD_TMP006_GET_RAW 0x55
@@ -1768,6 +1990,29 @@ struct ec_result_keyscan_seq_ctrl {
};
} __packed;
+/*
+ * Get the next pending MKBP event.
+ *
+ * Returns EC_RES_UNAVAILABLE if there is no event pending.
+ */
+#define EC_CMD_GET_NEXT_EVENT 0x67
+
+enum ec_mkbp_event {
+ /* Keyboard matrix changed. The event data is the new matrix state. */
+ EC_MKBP_EVENT_KEY_MATRIX = 0,
+
+ /* New host event. The event data is 4 bytes of host event flags. */
+ EC_MKBP_EVENT_HOST_EVENT = 1,
+
+ /* Number of MKBP events */
+ EC_MKBP_EVENT_COUNT,
+};
+
+struct ec_response_get_next_event {
+ uint8_t event_type;
+ /* Followed by event data if any */
+} __packed;
+
/*****************************************************************************/
/* Temperature sensor commands */
@@ -2420,122 +2665,6 @@ struct ec_params_reboot_ec {
/*****************************************************************************/
/*
- * ACPI commands
- *
- * These are valid ONLY on the ACPI command/data port.
- */
-
-/*
- * ACPI Read Embedded Controller
- *
- * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
- *
- * Use the following sequence:
- *
- * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
- * - Wait for EC_LPC_CMDR_PENDING bit to clear
- * - Write address to EC_LPC_ADDR_ACPI_DATA
- * - Wait for EC_LPC_CMDR_DATA bit to set
- * - Read value from EC_LPC_ADDR_ACPI_DATA
- */
-#define EC_CMD_ACPI_READ 0x80
-
-/*
- * ACPI Write Embedded Controller
- *
- * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
- *
- * Use the following sequence:
- *
- * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
- * - Wait for EC_LPC_CMDR_PENDING bit to clear
- * - Write address to EC_LPC_ADDR_ACPI_DATA
- * - Wait for EC_LPC_CMDR_PENDING bit to clear
- * - Write value to EC_LPC_ADDR_ACPI_DATA
- */
-#define EC_CMD_ACPI_WRITE 0x81
-
-/*
- * ACPI Query Embedded Controller
- *
- * This clears the lowest-order bit in the currently pending host events, and
- * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
- * event 0x80000000 = 32), or 0 if no event was pending.
- */
-#define EC_CMD_ACPI_QUERY_EVENT 0x84
-
-/* Valid addresses in ACPI memory space, for read/write commands */
-
-/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
-#define EC_ACPI_MEM_VERSION 0x00
-/*
- * Test location; writing value here updates test compliment byte to (0xff -
- * value).
- */
-#define EC_ACPI_MEM_TEST 0x01
-/* Test compliment; writes here are ignored. */
-#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
-
-/* Keyboard backlight brightness percent (0 - 100) */
-#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
-/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
-#define EC_ACPI_MEM_FAN_DUTY 0x04
-
-/*
- * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
- * independent thresholds attached to them. The current value of the ID
- * register determines which sensor is affected by the THRESHOLD and COMMIT
- * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
- * as the memory-mapped sensors. The COMMIT register applies those settings.
- *
- * The spec does not mandate any way to read back the threshold settings
- * themselves, but when a threshold is crossed the AP needs a way to determine
- * which sensor(s) are responsible. Each reading of the ID register clears and
- * returns one sensor ID that has crossed one of its threshold (in either
- * direction) since the last read. A value of 0xFF means "no new thresholds
- * have tripped". Setting or enabling the thresholds for a sensor will clear
- * the unread event count for that sensor.
- */
-#define EC_ACPI_MEM_TEMP_ID 0x05
-#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
-#define EC_ACPI_MEM_TEMP_COMMIT 0x07
-/*
- * Here are the bits for the COMMIT register:
- * bit 0 selects the threshold index for the chosen sensor (0/1)
- * bit 1 enables/disables the selected threshold (0 = off, 1 = on)
- * Each write to the commit register affects one threshold.
- */
-#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0)
-#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1)
-/*
- * Example:
- *
- * Set the thresholds for sensor 2 to 50 C and 60 C:
- * write 2 to [0x05] -- select temp sensor 2
- * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
- * write 0x2 to [0x07] -- enable threshold 0 with this value
- * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
- * write 0x3 to [0x07] -- enable threshold 1 with this value
- *
- * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
- * write 2 to [0x05] -- select temp sensor 2
- * write 0x1 to [0x07] -- disable threshold 1
- */
-
-/* DPTF battery charging current limit */
-#define EC_ACPI_MEM_CHARGING_LIMIT 0x08
-
-/* Charging limit is specified in 64 mA steps */
-#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
-/* Value to disable DPTF battery charging limit */
-#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
-
-/* Current version of ACPI memory address space */
-#define EC_ACPI_MEM_VERSION_CURRENT 1
-
-
-/*****************************************************************************/
-/*
* Special commands
*
* These do not follow the normal rules for commands. See each command for
@@ -2584,16 +2713,38 @@ struct ec_params_reboot_ec {
/* EC to PD MCU exchange status command */
#define EC_CMD_PD_EXCHANGE_STATUS 0x100
+enum pd_charge_state {
+ PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */
+ PD_CHARGE_NONE, /* No charging allowed */
+ PD_CHARGE_5V, /* 5V charging only */
+ PD_CHARGE_MAX /* Charge at max voltage */
+};
+
/* Status of EC being sent to PD */
struct ec_params_pd_status {
- int8_t batt_soc; /* battery state of charge */
+ int8_t batt_soc; /* battery state of charge */
+ uint8_t charge_state; /* charging state (from enum pd_charge_state) */
} __packed;
/* Status of PD being sent back to EC */
-#define PD_STATUS_HOST_EVENT (1 << 0)
+#define PD_STATUS_HOST_EVENT (1 << 0) /* Forward host event to AP */
+#define PD_STATUS_IN_RW (1 << 1) /* Running RW image */
+#define PD_STATUS_JUMPED_TO_IMAGE (1 << 2) /* Current image was jumped to */
struct ec_response_pd_status {
uint32_t status; /* PD MCU status */
uint32_t curr_lim_ma; /* input current limit */
+ int32_t active_charge_port; /* active charging port */
+} __packed;
+
+/* AP to PD MCU host event status command, cleared on read */
+#define EC_CMD_PD_HOST_EVENT_STATUS 0x104
+
+/* PD MCU host event status bits */
+#define PD_EVENT_UPDATE_DEVICE (1 << 0)
+#define PD_EVENT_POWER_CHANGE (1 << 1)
+#define PD_EVENT_IDENTITY_RECEIVED (1 << 2)
+struct ec_response_host_event_status {
+ uint32_t status; /* PD MCU host event status */
} __packed;
/* Set USB type-C port role and muxes */
@@ -2631,6 +2782,64 @@ struct ec_response_usb_pd_control {
uint8_t state;
} __packed;
+struct ec_response_usb_pd_control_v1 {
+ uint8_t enabled;
+ uint8_t role; /* [0] power: 0=SNK/1=SRC [1] data: 0=UFP/1=DFP */
+ uint8_t polarity;
+ char state[32];
+} __packed;
+
+#define EC_CMD_USB_PD_PORTS 0x102
+
+struct ec_response_usb_pd_ports {
+ uint8_t num_ports;
+} __packed;
+
+#define EC_CMD_USB_PD_POWER_INFO 0x103
+
+#define PD_POWER_CHARGING_PORT 0xff
+struct ec_params_usb_pd_power_info {
+ uint8_t port;
+} __packed;
+
+enum usb_chg_type {
+ USB_CHG_TYPE_NONE,
+ USB_CHG_TYPE_PD,
+ USB_CHG_TYPE_C,
+ USB_CHG_TYPE_PROPRIETARY,
+ USB_CHG_TYPE_BC12_DCP,
+ USB_CHG_TYPE_BC12_CDP,
+ USB_CHG_TYPE_BC12_SDP,
+ USB_CHG_TYPE_OTHER,
+ USB_CHG_TYPE_VBUS,
+};
+enum usb_power_roles {
+ USB_PD_PORT_POWER_DISCONNECTED,
+ USB_PD_PORT_POWER_SOURCE,
+ USB_PD_PORT_POWER_SINK,
+ USB_PD_PORT_POWER_SINK_NOT_CHARGING,
+};
+
+struct usb_chg_measures {
+ uint16_t voltage_max;
+ uint16_t voltage_now;
+ uint16_t current_max;
+ /*
+ * this structure is used below in struct ec_response_usb_pd_power_info,
+ * and currently expects an odd number of uint16_t for alignment.
+ */
+} __packed;
+
+struct ec_response_usb_pd_power_info {
+ uint8_t role;
+ uint8_t type;
+ uint8_t dualrole;
+ uint8_t reserved1;
+ struct usb_chg_measures meas;
+ uint16_t reserved2;
+ uint32_t max_power;
+} __packed;
+
/* Write USB-PD device FW */
#define EC_CMD_USB_PD_FW_UPDATE 0x110
@@ -2638,27 +2847,26 @@ enum usb_pd_fw_update_cmds {
USB_PD_FW_REBOOT,
USB_PD_FW_FLASH_ERASE,
USB_PD_FW_FLASH_WRITE,
- USB_PD_FW_FLASH_HASH,
+ USB_PD_FW_ERASE_SIG,
};
struct ec_params_usb_pd_fw_update {
+ uint16_t dev_id;
uint8_t cmd;
- uint8_t dev_id;
uint8_t port;
- uint8_t reserved; /* reserved */
uint32_t size; /* Size to write in bytes */
/* Followed by data to write */
} __packed;
/* Write USB-PD Accessory RW_HASH table entry */
#define EC_CMD_USB_PD_RW_HASH_ENTRY 0x111
-#define SHA1_DIGEST_SIZE 20
+/* RW hash is first 20 bytes of SHA-256 of RW section */
+#define PD_RW_HASH_SIZE 20
struct ec_params_usb_pd_rw_hash_entry {
- uint8_t dev_id;
- union {
- uint8_t b[SHA1_DIGEST_SIZE];
- uint32_t w[SHA1_DIGEST_SIZE/4];
- } dev_rw_hash;
+ uint16_t dev_id;
+ uint8_t dev_rw_hash[PD_RW_HASH_SIZE];
+ uint8_t reserved; /* For alignment of current_image */
+ uint32_t current_image; /* One of ec_current_image */
} __packed;
/* Read USB-PD Accessory info */
@@ -2668,6 +2876,154 @@ struct ec_params_usb_pd_info_request {
uint8_t port;
} __packed;
+/* Read USB-PD Device discovery info */
+#define EC_CMD_USB_PD_DISCOVERY 0x113
+struct ec_params_usb_pd_discovery_entry {
+ uint16_t vid; /* USB-IF VID */
+ uint16_t pid; /* USB-IF PID */
+ uint8_t ptype; /* product type (hub,periph,cable,ama) */
+} __packed;
+
+/* Override default charge behavior */
+#define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x114
+
+/* Negative port parameters have special meaning */
+enum usb_pd_override_ports {
+ OVERRIDE_DONT_CHARGE = -2,
+ OVERRIDE_OFF = -1,
+ /* [0, PD_PORT_COUNT): Port# */
+};
+
+struct ec_params_charge_port_override {
+ int16_t override_port; /* Override port# */
+} __packed;
+
+/* Read (and delete) one entry of PD event log */
+#define EC_CMD_PD_GET_LOG_ENTRY 0x115
+
+struct ec_response_pd_log {
+ uint32_t timestamp; /* relative timestamp in milliseconds */
+ uint8_t type; /* event type : see PD_EVENT_xx below */
+ uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */
+ uint16_t data; /* type-defined data payload */
+ uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */
+} __packed;
+
+
+/* The timestamp is the microsecond counter shifted to get about a ms. */
+#define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */
+
+#define PD_LOG_SIZE_MASK 0x1F
+#define PD_LOG_PORT_MASK 0xE0
+#define PD_LOG_PORT_SHIFT 5
+#define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \
+ ((size) & PD_LOG_SIZE_MASK))
+#define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)
+#define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK)
+
+/* PD event log : entry types */
+/* PD MCU events */
+#define PD_EVENT_MCU_BASE 0x00
+#define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0)
+#define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1)
+/* Reserved for custom board event */
+#define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2)
+/* PD generic accessory events */
+#define PD_EVENT_ACC_BASE 0x20
+#define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0)
+#define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1)
+/* PD power supply events */
+#define PD_EVENT_PS_BASE 0x40
+#define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0)
+/* PD video dongles events */
+#define PD_EVENT_VIDEO_BASE 0x60
+#define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0)
+#define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1)
+/* Returned in the "type" field, when there is no entry available */
+#define PD_EVENT_NO_ENTRY 0xFF
+
+/*
+ * PD_EVENT_MCU_CHARGE event definition :
+ * the payload is "struct usb_chg_measures"
+ * the data field contains the port state flags as defined below :
+ */
+/* Port partner is a dual role device */
+#define CHARGE_FLAGS_DUAL_ROLE (1 << 15)
+/* Port is the pending override port */
+#define CHARGE_FLAGS_DELAYED_OVERRIDE (1 << 14)
+/* Port is the override port */
+#define CHARGE_FLAGS_OVERRIDE (1 << 13)
+/* Charger type */
+#define CHARGE_FLAGS_TYPE_SHIFT 3
+#define CHARGE_FLAGS_TYPE_MASK (0xF << CHARGE_FLAGS_TYPE_SHIFT)
+/* Power delivery role */
+#define CHARGE_FLAGS_ROLE_MASK (7 << 0)
+
+/*
+ * PD_EVENT_PS_FAULT data field flags definition :
+ */
+#define PS_FAULT_OCP 1
+#define PS_FAULT_FAST_OCP 2
+#define PS_FAULT_OVP 3
+#define PS_FAULT_DISCH 4
+
+/*
+ * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info".
+ */
+struct mcdp_version {
+ uint8_t major;
+ uint8_t minor;
+ uint16_t build;
+} __packed;
+
+struct mcdp_info {
+ uint8_t family[2];
+ uint8_t chipid[2];
+ struct mcdp_version irom;
+ struct mcdp_version fw;
+} __packed;
+
+/* struct mcdp_info field decoding */
+#define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])
+#define MCDP_FAMILY(family) ((family[0] << 8) | family[1])
+
+/* Get/Set USB-PD Alternate mode info */
+#define EC_CMD_USB_PD_GET_AMODE 0x116
+struct ec_params_usb_pd_get_mode_request {
+ uint16_t svid_idx; /* SVID index to get */
+ uint8_t port; /* port */
+} __packed;
+
+struct ec_params_usb_pd_get_mode_response {
+ uint16_t svid; /* SVID */
+ uint16_t opos; /* Object Position */
+ uint32_t vdo[6]; /* Mode VDOs */
+} __packed;
+
+#define EC_CMD_USB_PD_SET_AMODE 0x117
+
+enum pd_mode_cmd {
+ PD_EXIT_MODE = 0,
+ PD_ENTER_MODE = 1,
+ /* Not a command. Do NOT remove. */
+ PD_MODE_CMD_COUNT,
+};
+
+struct ec_params_usb_pd_set_mode_request {
+ uint32_t cmd; /* enum pd_mode_cmd */
+ uint16_t svid; /* SVID to set */
+ uint8_t opos; /* Object Position */
+ uint8_t port; /* port */
+} __packed;
+
+/* Ask the PD MCU to record a log of a requested type */
+#define EC_CMD_PD_WRITE_LOG_ENTRY 0x118
+
+struct ec_params_pd_write_log_entry {
+ uint8_t type; /* event type : see PD_EVENT_xx above */
+ uint8_t port; /* port#, or 0 for events unrelated to a given port */
+} __packed;
+
#endif /* !__ACPI__ */
/*****************************************************************************/
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