[coreboot-gerrit] Patch set updated for coreboot: 071da9b broadcom/cygnus: add timestamps in pre-ram stages

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Tue Apr 21 10:44:42 CEST 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9855

-gerrit

commit 071da9b610376fc18f5b23a0dd59e96d35624b06
Author: Daisuke Nojiri <dnojiri at chromium.org>
Date:   Wed Mar 4 11:01:36 2015 -0800

    broadcom/cygnus: add timestamps in pre-ram stages
    
    BUG=none
    BRANCH=broadcom-firmware
    TEST=timestamp table:
      0501: 31858
      0005: 106680
      0503: 132098
      0504: 135573
      0006: 168656
      0013: 168660
      0014: 240487
      0502: 240491
      0001: 240515
      0002: 247544
      0003: 537158
    
    Signed-off-by: Daisuke Nojiri <dnojiri at chromium.org>
    Reviewed-on: https://chrome-internal-review.googlesource.com/204758
    Reviewed-by: Julius Werner <jwerner at chromium.org>
    Commit-Queue: Daisuke Nojiri <dnojiri at google.com>
    Tested-by: Daisuke Nojiri <dnojiri at google.com>
    Change-Id: I5b4608152e97d53e35d28aa7bed2bfd158409df9
    Reviewed-on: https://chromium-review.googlesource.com/256418
---
 src/soc/broadcom/cygnus/cbmem.c    |  4 +++-
 src/soc/broadcom/cygnus/romstage.c | 27 +++------------------------
 2 files changed, 6 insertions(+), 25 deletions(-)

diff --git a/src/soc/broadcom/cygnus/cbmem.c b/src/soc/broadcom/cygnus/cbmem.c
index 4532b7e..6b11a95 100644
--- a/src/soc/broadcom/cygnus/cbmem.c
+++ b/src/soc/broadcom/cygnus/cbmem.c
@@ -19,8 +19,10 @@
 
 #include <cbmem.h>
 #include <stddef.h>
+#include <symbols.h>
+#include <soc/sdram.h>
 
 void *cbmem_top(void)
 {
-	return NULL;
+	return _dram + sdram_size_mb()*MiB;
 }
diff --git a/src/soc/broadcom/cygnus/romstage.c b/src/soc/broadcom/cygnus/romstage.c
index f293f31..13a0d4f 100644
--- a/src/soc/broadcom/cygnus/romstage.c
+++ b/src/soc/broadcom/cygnus/romstage.c
@@ -35,25 +35,13 @@
 
 void main(void)
 {
-#if CONFIG_COLLECT_TIMESTAMPS
-	uint64_t start_romstage_time;
-	uint64_t before_dram_time;
-	uint64_t after_dram_time;
-	uint64_t base_time = timestamp_get();
-	start_romstage_time = timestamp_get();
-#endif
+	timestamp_add_now(TS_START_ROMSTAGE);
 
 	console_init();
 
-#if CONFIG_COLLECT_TIMESTAMPS
-	before_dram_time = timestamp_get();
-#endif
-
+	timestamp_add_now(TS_BEFORE_INITRAM);
 	sdram_init();
-
-#if CONFIG_COLLECT_TIMESTAMPS
-	after_dram_time = timestamp_get();
-#endif
+	timestamp_add_now(TS_AFTER_INITRAM);
 
 	/* Now that DRAM is up, add mappings for it and DMA coherency buffer. */
 	mmu_config_range((uintptr_t)_dram/MiB,
@@ -63,14 +51,5 @@ void main(void)
 
 	cbmem_initialize_empty();
 
-#if CONFIG_COLLECT_TIMESTAMPS
-	timestamp_init(base_time);
-	timestamp_add(TS_START_ROMSTAGE, start_romstage_time);
-	timestamp_add(TS_BEFORE_INITRAM, before_dram_time);
-	timestamp_add(TS_AFTER_INITRAM, after_dram_time);
-
-	timestamp_add_now(TS_END_ROMSTAGE);
-#endif
-
 	run_ramstage();
 }



More information about the coreboot-gerrit mailing list