[coreboot-gerrit] New patch to review for coreboot: ebc9786 google/veyron_*: update sdram-ddr3-samsung-4GB.inc
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Tue Apr 21 10:09:48 CEST 2015
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9866
-gerrit
commit ebc9786e0ddd266a4fa1660d365514b89a646003
Author: jinkun.hong <jinkun.hong at rock-chips.com>
Date: Tue Mar 17 15:49:17 2015 +0800
google/veyron_*: update sdram-ddr3-samsung-4GB.inc
The old parameters are wrong. K4B8G1646Q: rank = 2, row = 15 is right.
BUG=None
TEST=Boot from veyron
BRANCH=None
Change-Id: I41848c158f3ea028035cc8c0d969a4a449390a54
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: 601ba06c636ff0f0779e6ef9357b53060a1ec19b
Original-Change-Id: I5bc6798890b3ba0f5134d048ae6bbf2bfd696676
Original-Signed-off-by: jinkun.hong <jinkun.hong at rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/260483
Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
Original-Tested-by: Paul Ma <magf at bitland.com.cn>
---
.../veyron_brain/sdram_inf/sdram-ddr3-samsung-4GB.inc | 14 +++++++-------
.../veyron_danger/sdram_inf/sdram-ddr3-samsung-4GB.inc | 14 +++++++-------
.../veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc | 14 +++++++-------
.../veyron_mighty/sdram_inf/sdram-ddr3-samsung-4GB.inc | 14 +++++++-------
.../veyron_pinky/sdram_inf/sdram-ddr3-samsung-4GB.inc | 14 +++++++-------
.../veyron_speedy/sdram_inf/sdram-ddr3-samsung-4GB.inc | 14 +++++++-------
6 files changed, 42 insertions(+), 42 deletions(-)
diff --git a/src/mainboard/google/veyron_brain/sdram_inf/sdram-ddr3-samsung-4GB.inc b/src/mainboard/google/veyron_brain/sdram_inf/sdram-ddr3-samsung-4GB.inc
index bd6201c..a32f1a6 100644
--- a/src/mainboard/google/veyron_brain/sdram_inf/sdram-ddr3-samsung-4GB.inc
+++ b/src/mainboard/google/veyron_brain/sdram_inf/sdram-ddr3-samsung-4GB.inc
@@ -2,24 +2,24 @@
/* 4 Samsung K4B8G1646Q chips */
{
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
},
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
}
},
{
@@ -69,7 +69,7 @@
},
.noc_timing = 0x30B25564,
.noc_activate = 0x627,
- .ddrconfig = 4,
+ .ddrconfig = 3,
.ddr_freq = 666*MHz,
.dramtype = DDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_danger/sdram_inf/sdram-ddr3-samsung-4GB.inc b/src/mainboard/google/veyron_danger/sdram_inf/sdram-ddr3-samsung-4GB.inc
index bd6201c..a32f1a6 100644
--- a/src/mainboard/google/veyron_danger/sdram_inf/sdram-ddr3-samsung-4GB.inc
+++ b/src/mainboard/google/veyron_danger/sdram_inf/sdram-ddr3-samsung-4GB.inc
@@ -2,24 +2,24 @@
/* 4 Samsung K4B8G1646Q chips */
{
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
},
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
}
},
{
@@ -69,7 +69,7 @@
},
.noc_timing = 0x30B25564,
.noc_activate = 0x627,
- .ddrconfig = 4,
+ .ddrconfig = 3,
.ddr_freq = 666*MHz,
.dramtype = DDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc b/src/mainboard/google/veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc
index bd6201c..a32f1a6 100644
--- a/src/mainboard/google/veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc
+++ b/src/mainboard/google/veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc
@@ -2,24 +2,24 @@
/* 4 Samsung K4B8G1646Q chips */
{
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
},
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
}
},
{
@@ -69,7 +69,7 @@
},
.noc_timing = 0x30B25564,
.noc_activate = 0x627,
- .ddrconfig = 4,
+ .ddrconfig = 3,
.ddr_freq = 666*MHz,
.dramtype = DDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-4GB.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-4GB.inc
index bd6201c..a32f1a6 100644
--- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-4GB.inc
+++ b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-4GB.inc
@@ -2,24 +2,24 @@
/* 4 Samsung K4B8G1646Q chips */
{
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
},
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
}
},
{
@@ -69,7 +69,7 @@
},
.noc_timing = 0x30B25564,
.noc_activate = 0x627,
- .ddrconfig = 4,
+ .ddrconfig = 3,
.ddr_freq = 666*MHz,
.dramtype = DDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_pinky/sdram_inf/sdram-ddr3-samsung-4GB.inc b/src/mainboard/google/veyron_pinky/sdram_inf/sdram-ddr3-samsung-4GB.inc
index bd6201c..a32f1a6 100644
--- a/src/mainboard/google/veyron_pinky/sdram_inf/sdram-ddr3-samsung-4GB.inc
+++ b/src/mainboard/google/veyron_pinky/sdram_inf/sdram-ddr3-samsung-4GB.inc
@@ -2,24 +2,24 @@
/* 4 Samsung K4B8G1646Q chips */
{
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
},
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
}
},
{
@@ -69,7 +69,7 @@
},
.noc_timing = 0x30B25564,
.noc_activate = 0x627,
- .ddrconfig = 4,
+ .ddrconfig = 3,
.ddr_freq = 666*MHz,
.dramtype = DDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_speedy/sdram_inf/sdram-ddr3-samsung-4GB.inc b/src/mainboard/google/veyron_speedy/sdram_inf/sdram-ddr3-samsung-4GB.inc
index bd6201c..a32f1a6 100644
--- a/src/mainboard/google/veyron_speedy/sdram_inf/sdram-ddr3-samsung-4GB.inc
+++ b/src/mainboard/google/veyron_speedy/sdram_inf/sdram-ddr3-samsung-4GB.inc
@@ -2,24 +2,24 @@
/* 4 Samsung K4B8G1646Q chips */
{
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
},
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
}
},
{
@@ -69,7 +69,7 @@
},
.noc_timing = 0x30B25564,
.noc_activate = 0x627,
- .ddrconfig = 4,
+ .ddrconfig = 3,
.ddr_freq = 666*MHz,
.dramtype = DDR3,
.num_channels = 2,
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