[coreboot-gerrit] Patch merged into coreboot/master: df4081e broadwell: Clear USB3.0 PORTSC status bits in sleep_prepare.

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit df4081e72cda341236350647f96b419e03b9edce
Author: Todd Broch <tbroch at chromium.org>
Date:   Fri Feb 6 17:13:53 2015 -0800

    broadwell: Clear USB3.0 PORTSC status bits in sleep_prepare.
    
    Found that any non-USB3.0 devices connected to type-C ports
    (displayPort dongles) cause XHCI port to see connection which in turn
    leads us to enter USB compliance mode.
    
    That in turn causes the port to wake the system for a yet-to-be
    determined reason.  Clearing the PORTSC status bits (actually just
    CSC) seems to remedy the wake.
    
    Signed-off-by: Todd Broch <tbroch at chromium.org>
    
    BRANCH=samus
    BUG=chrome-os-partner:35320
    TEST=manual,
    
    1. Plug hoho into type-C port on samus and remove
    2. powerd_dbus_suspend
    
    Device stays asleep.
    
    Change-Id: Id3a291579ffca0152a7ef32e37ecae80ca08a82b
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 0be5cba4916681dceb0372e76d9643e6c7175db5
    Original-Change-Id: I1396b9f8013dbbb31286c1d8958af592b3da7475
    Original-Reviewed-on: https://chromium-review.googlesource.com/247410
    Original-Commit-Queue: Todd Broch <tbroch at chromium.org>
    Original-Tested-by: Todd Broch <tbroch at chromium.org>
    Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: http://review.coreboot.org/9814
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/9814 for details.

-gerrit