[coreboot-gerrit] Patch set updated for coreboot: 87545ba pistachio: add clock setup for all I2C interfaces

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9839

-gerrit

commit 87545bafb128c23655a9bc2e2470f0196884a446
Author: Ionela Voinescu <ionela.voinescu at imgtec.com>
Date:   Thu Mar 5 13:09:57 2015 +0000

    pistachio: add clock setup for all I2C interfaces
    
    BUG=chrome-os-partner:31438
    TEST=tested on Pistachio bring up board; all I2C interfaces
         were tested with the TPM and they all work properly.
    BRANCH=none
    
    Change-Id: I02202585140beb818212c02800f6b7e4966a922a
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 33b2adecc4939ac73fffba47adf1c8306a888b8d
    Original-Change-Id: Ida7eaa72d4d6e6b034319086410de5baa63788bc
    Original-Signed-off-by: Ionela Voinescu <ionela.voinescu at imgtec.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/256361
    Original-Reviewed-by: Chris Lane <chris.lane at frontier-silicon.com>
    Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
---
 src/soc/imgtec/pistachio/clocks.c             | 36 +++++++++++++--------------
 src/soc/imgtec/pistachio/include/soc/clocks.h |  2 +-
 2 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/src/soc/imgtec/pistachio/clocks.c b/src/soc/imgtec/pistachio/clocks.c
index f3a9cee..0b9774a 100644
--- a/src/soc/imgtec/pistachio/clocks.c
+++ b/src/soc/imgtec/pistachio/clocks.c
@@ -98,11 +98,11 @@
 #define UART1CLKOUT_CTRL_ADDR		0xB8144240
 #define UART1CLKOUT_MASK		0x000003FF
 
-/* Definitions for I2C0 setup */
-#define I2C0CLKDIV1_CTRL_ADDR		0xB814413C
-#define I2C0CLKDIV1_MASK		0x0000007F
-#define I2C0CLKOUT_CTRL_ADDR		0xB8144140
-#define I2C0CLKOUT_MASK			0x0000007F
+/* Definitions for I2C setup */
+#define I2CCLKDIV1_CTRL_ADDR(i)		(0xB8144000 + 0x013C + (2*(i)*4))
+#define I2CCLKDIV1_MASK			0x0000007F
+#define I2CCLKOUT_CTRL_ADDR(i)		(0xB8144000 + 0x0140 + (2*(i)*4))
+#define I2CCLKOUT_MASK			0x0000007F
 
 /* Definitions for ROM clock setup */
 #define ROMCLKOUT_CTRL_ADDR		0xB814490C
@@ -307,29 +307,29 @@ void uart1_clk_setup(u8 divider1, u16 divider2)
 }
 
 /*
- * i2c_clk_setup: sets up clocks for I2C0
+ * i2c_clk_setup: sets up clocks for I2C
  * divider1: 7-bit divider value
  * divider2: 7-bit divider value
  */
-void i2c0_clk_setup(u8 divider1, u16 divider2)
+void i2c_clk_setup(u8 divider1, u16 divider2, u8 interface)
 {
 	u32 reg;
 
 	/* Check input parameters */
-	assert(!(divider1 & ~(I2C0CLKDIV1_MASK)));
-	assert(!(divider2 & ~(I2C0CLKOUT_MASK)));
-
+	assert(!(divider1 & ~(I2CCLKDIV1_MASK)));
+	assert(!(divider2 & ~(I2CCLKOUT_MASK)));
+	assert(interface < 4);
 	/* Set divider 1 */
-	reg = read32(I2C0CLKDIV1_CTRL_ADDR);
-	reg &= ~I2C0CLKDIV1_MASK;
-	reg |= divider1 & I2C0CLKDIV1_MASK;
-	write32(I2C0CLKDIV1_CTRL_ADDR, reg);
+	reg = read32(I2CCLKDIV1_CTRL_ADDR(interface));
+	reg &= ~I2CCLKDIV1_MASK;
+	reg |= divider1 & I2CCLKDIV1_MASK;
+	write32(I2CCLKDIV1_CTRL_ADDR(interface), reg);
 
 	/* Set divider 2 */
-	reg = read32(I2C0CLKOUT_CTRL_ADDR);
-	reg &= ~I2C0CLKOUT_MASK;
-	reg |= divider2 & I2C0CLKOUT_MASK;
-	write32(I2C0CLKOUT_CTRL_ADDR, reg);
+	reg = read32(I2CCLKOUT_CTRL_ADDR(interface));
+	reg &= ~I2CCLKOUT_MASK;
+	reg |= divider2 & I2CCLKOUT_MASK;
+	write32(I2CCLKOUT_CTRL_ADDR(interface), reg);
 }
 
 /* system_clk_setup: sets up the system (peripheral) clock */
diff --git a/src/soc/imgtec/pistachio/include/soc/clocks.h b/src/soc/imgtec/pistachio/include/soc/clocks.h
index 81b640e..f351a6f 100644
--- a/src/soc/imgtec/pistachio/include/soc/clocks.h
+++ b/src/soc/imgtec/pistachio/include/soc/clocks.h
@@ -28,7 +28,7 @@ int mips_pll_setup(u8 divider1, u8 divider2, u8 predivider, u32 feedback);
 void system_clk_setup(u8 divider);
 void mips_clk_setup(u8 divider1, u8 divider2);
 void uart1_clk_setup(u8 divider1, u16 divider2);
-void i2c0_clk_setup(u8 divider1, u16 divider2);
+void i2c_clk_setup(u8 divider1, u16 divider2, u8 interface);
 int usb_clk_setup(u8 divider, u8 refclksel, u8 fsel);
 void rom_clk_setup(u8 divider);
 void eth_clk_setup(u8 mux, u8 divider);