[coreboot-gerrit] Patch merged into coreboot/master: fb03239 spi: Add function to read flash status register

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit fb032398d262ff7594c35c65b6f14897bb331a39
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Thu Jan 15 15:28:46 2015 -0800

    spi: Add function to read flash status register
    
    Add a function that allows reading of the status register
    from the SPI chip.  This can be used to determine whether
    write protection is enabled on the chip.
    
    BUG=chrome-os-partner:35209
    BRANCH=haswell
    TEST=build and boot on peppy
    
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: https://chromium-review.googlesource.com/240702
    Reviewed-by: Shawn N <shawnn at chromium.org>
    (cherry picked from commit c58f17689162b291a7cdb57649a237de21b73545)
    
    Change-Id: Ib7fead2cc4ea4339ece322dd18403362c9c79c7d
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 9fbdf0d72892eef4a742a418a347ecf650c01ea5
    Original-Change-Id: I2541b22c51e43f7b7542ee0f48618cf411976a98
    Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/241128
    Original-Reviewed-by: Shawn N <shawnn at chromium.org>
    Reviewed-on: http://review.coreboot.org/9730
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/9730 for details.

-gerrit