[coreboot-gerrit] New patch to review for coreboot: bdd850c ipq806x: Add support for mmu in bootblock.
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Thu Apr 16 14:52:18 CEST 2015
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9756
-gerrit
commit bdd850cabed09bca16aead4665ffa5e8a4787263
Author: Deepa Dinamani <deepad at codeaurora.org>
Date: Mon Jan 12 11:57:09 2015 -0800
ipq806x: Add support for mmu in bootblock.
move mmu setup from RAM stage to boot block
Enabling mmu earlier, helps speed up the boot time.
BRANCH=storm
BUG=chrome-os-partner:35024
TEST=Verified the mmu table dump matches the programmed values.
Change-Id: I8f581538d5dfd0d78538c9fe50f689d54b740685
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: fb799a6d61f9c2f478434a71584d0edb94af4b59
Original-Change-Id: I110497875002a88add7eb4312a70c0de8c28bc4f
Original-Signed-off-by: Deepa Dinamani <deepad at codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/247120
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Original-Commit-Queue: Trevor Bourget <tbourget at codeaurora.org>
---
src/mainboard/google/storm/Makefile.inc | 4 ++
src/mainboard/google/storm/bootblock.c | 19 +++++++
src/mainboard/google/storm/mainboard.c | 37 ++-----------
src/mainboard/google/storm/mmu.c | 67 +++++++++++++++++++++++
src/mainboard/google/storm/mmu.h | 25 +++++++++
src/mainboard/google/storm/romstage.c | 6 ++
src/soc/qualcomm/ipq806x/include/soc/memlayout.ld | 5 +-
7 files changed, 131 insertions(+), 32 deletions(-)
diff --git a/src/mainboard/google/storm/Makefile.inc b/src/mainboard/google/storm/Makefile.inc
index 6b7190c..c0a523a 100644
--- a/src/mainboard/google/storm/Makefile.inc
+++ b/src/mainboard/google/storm/Makefile.inc
@@ -17,7 +17,9 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
+bootblock-y += bootblock.c
bootblock-y += cdp.c
+bootblock-y += mmu.c
bootblock-y += reset.c
verstage-y += cdp.c
@@ -28,12 +30,14 @@ verstage-y += reset.c
romstage-y += romstage.c
romstage-y += cdp.c
+romstage-y += mmu.c
romstage-y += reset.c
ramstage-y += boardid.c
ramstage-y += cdp.c
ramstage-y += chromeos.c
ramstage-y += mainboard.c
+ramstage-y += mmu.c
ramstage-y += reset.c
bootblock-y += memlayout.ld
diff --git a/src/mainboard/google/storm/bootblock.c b/src/mainboard/google/storm/bootblock.c
new file mode 100644
index 0000000..cdc870a
--- /dev/null
+++ b/src/mainboard/google/storm/bootblock.c
@@ -0,0 +1,19 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include "mmu.h"
+
+void bootblock_mainboard_init(void)
+{
+ setup_mmu(DRAM_NOT_INITIALIZED);
+}
diff --git a/src/mainboard/google/storm/mainboard.c b/src/mainboard/google/storm/mainboard.c
index e69a1ea..f83cfe9 100644
--- a/src/mainboard/google/storm/mainboard.c
+++ b/src/mainboard/google/storm/mainboard.c
@@ -1,6 +1,7 @@
/*
* This file is part of the coreboot project.
*
+ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
@@ -17,7 +18,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <arch/cache.h>
#include <boardid.h>
#include <boot/coreboot_tables.h>
#include <delay.h>
@@ -29,15 +29,7 @@
#include <symbols.h>
#include <vendorcode/google/chromeos/chromeos.h>
-
-/* convenient shorthand (in MB) */
-#define DRAM_START ((uintptr_t)_dram / MiB)
-#define DRAM_SIZE (CONFIG_DRAM_SIZE_MB)
-#define DRAM_END (DRAM_START + DRAM_SIZE)
-
-/* DMA memory for drivers */
-#define DMA_START ((uintptr_t)_dma_coherent / MiB)
-#define DMA_SIZE (_dma_coherent_size / MiB)
+#include "mmu.h"
#define USB_ENABLE_GPIO 51
@@ -53,26 +45,6 @@ static void setup_usb(void)
setup_usb_host1();
}
-static void setup_mmu(void)
-{
- dcache_mmu_disable();
-
- /* Map Device memory. */
- mmu_config_range(0, DRAM_START, DCACHE_OFF);
- /* Disable Page 0 for trapping NULL pointer references. */
- mmu_disable_range(0, 1);
- /* Map DRAM memory */
- mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
- /* Map DMA memory */
- mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF);
-
- mmu_disable_range(DRAM_END, 4096 - DRAM_END);
-
- mmu_init();
-
- dcache_mmu_enable();
-}
-
#define TPM_RESET_GPIO 22
static void setup_tpm(void)
{
@@ -110,9 +82,12 @@ static void assert_sw_reset(void)
static void mainboard_init(device_t dev)
{
+ /* disable mmu and d-cache before setting up secure world.*/
+ dcache_mmu_disable();
start_tzbsp();
+ /* Setup mmu and d-cache again as non secure entries. */
+ setup_mmu(DRAM_INITIALIZED);
start_rpm();
- setup_mmu();
setup_usb();
assert_sw_reset();
setup_tpm();
diff --git a/src/mainboard/google/storm/mmu.c b/src/mainboard/google/storm/mmu.c
new file mode 100644
index 0000000..47e3b09
--- /dev/null
+++ b/src/mainboard/google/storm/mmu.c
@@ -0,0 +1,67 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/cache.h>
+#include <symbols.h>
+#include "mmu.h"
+
+/* convenient shorthand (in MB) */
+#define RPM_START ((uintptr_t)_rpm / KiB)
+#define RPM_END ((uintptr_t)_erpm / KiB)
+#define RPM_SIZE (RPM_END - RPM_START)
+#define SRAM_START ((uintptr_t)_sram / KiB)
+#define SRAM_END ((uintptr_t)_esram / KiB)
+#define DRAM_START ((uintptr_t)_dram / MiB)
+#define DRAM_SIZE (CONFIG_DRAM_SIZE_MB)
+#define DRAM_END (DRAM_START + DRAM_SIZE)
+
+/* DMA memory for drivers */
+#define DMA_START ((uintptr_t)_dma_coherent / MiB)
+#define DMA_SIZE (_dma_coherent_size / MiB)
+
+void setup_dram_mappings(enum dram_state dram)
+{
+ if (dram == DRAM_INITIALIZED) {
+ mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
+ /* Map DMA memory */
+ mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF);
+ } else {
+ mmu_disable_range(DRAM_START, DRAM_SIZE);
+ /* Map DMA memory */
+ mmu_disable_range(DMA_START, DMA_SIZE);
+ }
+}
+
+void setup_mmu(enum dram_state dram)
+{
+ dcache_mmu_disable();
+
+ /* start with mapping everything as strongly ordered. */
+ mmu_config_range(0, 4096, DCACHE_OFF);
+
+ /* Map Device memory. */
+ mmu_config_range_kb(RPM_START, RPM_SIZE, DCACHE_OFF);
+
+ /* TODO: disable Page 0 for trapping NULL pointer references. */
+
+ mmu_config_range_kb(SRAM_START, SRAM_END - SRAM_START,
+ DCACHE_WRITEBACK);
+
+ /* Map DRAM memory */
+ setup_dram_mappings(dram);
+
+ mmu_disable_range(DRAM_END, 4096 - DRAM_END);
+
+ mmu_init();
+
+ dcache_mmu_enable();
+}
diff --git a/src/mainboard/google/storm/mmu.h b/src/mainboard/google/storm/mmu.h
new file mode 100644
index 0000000..f743d64
--- /dev/null
+++ b/src/mainboard/google/storm/mmu.h
@@ -0,0 +1,25 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <types.h>
+
+extern u8 _rpm[];
+extern u8 _erpm[];
+
+enum dram_state {
+ DRAM_INITIALIZED = 0,
+ DRAM_NOT_INITIALIZED = 1,
+};
+
+void setup_dram_mappings(enum dram_state dram);
+void setup_mmu(enum dram_state);
+
diff --git a/src/mainboard/google/storm/romstage.c b/src/mainboard/google/storm/romstage.c
index 3c7543b..d827ce6 100644
--- a/src/mainboard/google/storm/romstage.c
+++ b/src/mainboard/google/storm/romstage.c
@@ -1,6 +1,7 @@
/*
* This file is part of the coreboot project.
*
+ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
@@ -21,11 +22,16 @@
#include <console/console.h>
#include <program_loading.h>
#include <soc/soc_services.h>
+#include "mmu.h"
void main(void)
{
console_init();
initialize_dram();
+
+ /* Add dram mappings to mmu tables. */
+ setup_dram_mappings(DRAM_INITIALIZED);
+
cbmem_initialize_empty();
run_ramstage();
}
diff --git a/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld b/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
index 7ac0662..bfb4450 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
+++ b/src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
@@ -1,6 +1,7 @@
/*
* This file is part of the coreboot project.
*
+ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
@@ -24,6 +25,7 @@
SECTIONS
{
+ REGION(rpm, 0x00020000, 160K, 8K)
SRAM_START(0x2A000000)
/* This includes bootblock image, can be reused after bootblock starts */
/* UBER_SBL(0x2A000000, 48K) */
@@ -49,8 +51,9 @@ SECTIONS
* availale, which means CBFS cache must be in SRAM, which in turn means
* that PRERAM_CBFS_CACHE description can not be used here.
*/
- CBFS_CACHE(0x2A044000, 96K)
+ CBFS_CACHE(0x2A044000, 93K)
#endif
+ TTB_SUBTABLES(0x2A05B800, 2K)
TTB(0x2A05C000, 16K)
SRAM_END(0x2A060000)
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