[coreboot-gerrit] Patch set updated for coreboot: f49869c google/storm: prepare enabling vboot2

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Wed Apr 15 17:25:18 CEST 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9684

-gerrit

commit f49869c76243c7a94985fa8fb14c2c9785945fd3
Author: Vadim Bendebury <vbendeb at chromium.org>
Date:   Wed Dec 10 20:11:30 2014 -0800

    google/storm: prepare enabling vboot2
    
    This change sets up the list of source files for vboot2's
    verstage without enabling it.
    
    BRANCH=storm
    BUG=chrome-os-partner:34161
    TEST=not much testing yet, just successful compilation.
    
    Change-Id: I4052c20795459bf0e057c0f0952226ea4a8c89f1
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 48847ab8acfbe4b33d61d3d012c72c025cd8f364
    Original-Change-Id: I1d7944e681f8a4b113a90ac028a0faba4423be89
    Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/234643
---
 src/mainboard/google/storm/Kconfig      | 1 +
 src/mainboard/google/storm/Makefile.inc | 3 +++
 src/soc/qualcomm/ipq806x/Makefile.inc   | 6 ++++++
 3 files changed, 10 insertions(+)

diff --git a/src/mainboard/google/storm/Kconfig b/src/mainboard/google/storm/Kconfig
index 29f0a73..6959d50 100644
--- a/src/mainboard/google/storm/Kconfig
+++ b/src/mainboard/google/storm/Kconfig
@@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select COMMON_CBFS_SPI_WRAPPER
 	select HAVE_HARD_RESET
 	select MAINBOARD_HAS_BOOTBLOCK_INIT
+	select RETURN_FROM_VERSTAGE
 	select SPI_FLASH
 	select SPI_FLASH_SPANSION
 
diff --git a/src/mainboard/google/storm/Makefile.inc b/src/mainboard/google/storm/Makefile.inc
index aace929..bcd7868 100644
--- a/src/mainboard/google/storm/Makefile.inc
+++ b/src/mainboard/google/storm/Makefile.inc
@@ -20,6 +20,9 @@
 bootblock-y += cdp.c
 bootblock-y += reset.c
 
+verstage-y += cdp.c
+verstage-y += chromeos.c
+verstage-y += memlayout.ld
 verstage-y += reset.c
 
 romstage-y += romstage.c
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index 16381a4..c0378bc 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -23,6 +23,12 @@ bootblock-$(CONFIG_SPI_FLASH) += spi.c
 bootblock-y += timer.c
 bootblock-$(CONFIG_DRIVERS_UART) += uart.c
 
+verstage-y += clock.c
+verstage-y += gpio.c
+verstage-y += spi.c
+verstage-y += timer.c
+verstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c
+
 romstage-y += clock.c
 romstage-y += gpio.c
 romstage-$(CONFIG_SPI_FLASH) += spi.c



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