[coreboot-gerrit] New patch to review for coreboot: 6f756da ipq806x: load and start RPM

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9692

-gerrit

commit 6f756dac77c001f5161dcf1966bfacfb0c28fbc9
Author: Vadim Bendebury <vbendeb at chromium.org>
Date:   Tue Dec 16 14:34:28 2014 -0800

    ipq806x: load and start RPM
    
    This patch finds the RPM image in the CBFS, loads it as defined by the
    MBN header and signals to the RPM processor where the image is
    located and waits for confirmation of the RPM starting.
    
    The interactions with the RPM processor are copied as is from the
    vendor provided sample code.
    
    Debug messages added to help identify problems with loading the blobs,
    should they ever happen.
    
    BRANCH=storm
    BUG=chrome-os-partner:34161
    TEST=ramstage reports both TZBSP and RPM starting.
    
    Change-Id: I81e86684f9d1b614f2059ee82c6561f9484605de
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: bbf2eda04a6e72b4f7b780f493b5a1cea0abfeb7
    Original-Change-Id: Ic10af0744574c0eca9b5ab7567808c1b8d7fe0c2
    Original-Signed-off-by: Vikas Das <vdas at codeaurora.org>
    Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/236661
    Original-Reviewed-by: Varadarajan Narayanan <varada at qti.qualcomm.com>
---
 src/mainboard/google/storm/mainboard.c             |  1 +
 src/soc/qualcomm/ipq806x/blobs_init.c              | 45 ++++++++++++++++++++--
 src/soc/qualcomm/ipq806x/include/soc/iomap.h       |  8 ++++
 .../qualcomm/ipq806x/include/soc/soc_services.h    |  4 ++
 4 files changed, 55 insertions(+), 3 deletions(-)

diff --git a/src/mainboard/google/storm/mainboard.c b/src/mainboard/google/storm/mainboard.c
index 5abf2f7..e69a1ea 100644
--- a/src/mainboard/google/storm/mainboard.c
+++ b/src/mainboard/google/storm/mainboard.c
@@ -111,6 +111,7 @@ static void assert_sw_reset(void)
 static void mainboard_init(device_t dev)
 {
 	 start_tzbsp();
+	 start_rpm();
 	 setup_mmu();
 	 setup_usb();
 	 assert_sw_reset();
diff --git a/src/soc/qualcomm/ipq806x/blobs_init.c b/src/soc/qualcomm/ipq806x/blobs_init.c
index 24f9e64..034df5f 100644
--- a/src/soc/qualcomm/ipq806x/blobs_init.c
+++ b/src/soc/qualcomm/ipq806x/blobs_init.c
@@ -2,6 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Copyright 2014 Google Inc.
+ * Copyright (c) 2014, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -17,14 +18,16 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <arch/cache.h>
+#include <arch/io.h>
 #include <cbfs.h>
+#include <console/console.h>
 #include <string.h>
-#include <arch/cache.h>
+#include <timer.h>
 
+#include <soc/iomap.h>
 #include <soc/soc_services.h>
 
-#include <console/console.h>
-
 #include "mbn_header.h"
 
 static void *load_ipq_blob(const char *file_name)
@@ -93,8 +96,44 @@ void start_tzbsp(void)
 	if (!tzbsp)
 		die("could not find or map TZBSP\n");
 
+	printk(BIOS_INFO, "Starting TZBSP\n");
+
 	tz_init_wrapper(0, 0, tzbsp);
 }
 
+void start_rpm(void)
+{
+	u32 load_addr;
+	u32 ready_mask = 1 << 10;
+	struct stopwatch sw;
+
+	if (readl(RPM_SIGNAL_COOKIE) == RPM_FW_MAGIC_NUM) {
+		printk(BIOS_INFO, "RPM appears to have already started\n");
+		return;
+	}
+
+	load_addr = (u32) load_ipq_blob("rpm.mbn");
+	if (!load_addr)
+		die("could not find or map RPM code\n");
+
+	printk(BIOS_INFO, "Starting RPM\n");
+
+	/* Clear 'ready' indication. */
+	writel(readl(RPM_INT_ACK) & ~ready_mask, RPM_INT_ACK);
+
+	/* Set RPM entry address */
+	writel(load_addr, RPM_SIGNAL_ENTRY);
+	/* Set cookie */
+	writel(RPM_FW_MAGIC_NUM, RPM_SIGNAL_COOKIE);
+
+	/* Wait for RPM start indication, up to 100ms. */
+	stopwatch_init_usecs_expire(&sw, 100000);
+	while (!(readl(RPM_INT) & ready_mask))
+		if (stopwatch_expired(&sw))
+			die("RPM Initialization failed\n");
+
+	/* Acknowledge RPM initialization */
+	writel(ready_mask, RPM_INT_ACK);
+}
 #endif  /* __PRE_RAM__ ^^^^^^ NOT defined */
 
diff --git a/src/soc/qualcomm/ipq806x/include/soc/iomap.h b/src/soc/qualcomm/ipq806x/include/soc/iomap.h
index 129b177..7613180 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/iomap.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/iomap.h
@@ -81,6 +81,13 @@
 #define DGT_CLEAR            DGT_REG(0x000C)
 #define DGT_CLK_CTL          DGT_REG(0x0010)
 
+/* RPM interface constants */
+#define RPM_INT           ((void *)0x63020)
+#define RPM_INT_ACK       ((void *)0x63060)
+#define RPM_SIGNAL_COOKIE ((void *)0x47C20)
+#define RPM_SIGNAL_ENTRY  ((void *)0x47C24)
+#define RPM_FW_MAGIC_NUM 0x4D505242
+
 #define TLMM_BASE_ADDR      ((char *)0x00800000)
 #define GPIO_CONFIG_ADDR(x) (TLMM_BASE_ADDR + 0x1000 + (x)*0x10)
 #define GPIO_IN_OUT_ADDR(x) (GPIO_CONFIG_ADDR(x) + 4)
@@ -114,4 +121,5 @@
 #define GSBI_QUP5_BASE		0x1A280000
 #define GSBI_QUP6_BASE		0x16580000
 #define GSBI_QUP7_BASE		0x16680000
+
 #endif // __SOC_QUALCOMM_IPQ806X_IOMAP_H_
diff --git a/src/soc/qualcomm/ipq806x/include/soc/soc_services.h b/src/soc/qualcomm/ipq806x/include/soc/soc_services.h
index b852d7f..6aefb72 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/soc_services.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/soc_services.h
@@ -30,6 +30,10 @@ int initialize_dram(void);
 /* Loads and runs TZBSP, switches into user mode. */
 void start_tzbsp(void);
 
+/* A helper function needed to start TZBSP properly. */
 int tz_init_wrapper(int, int, void *);
 
+/* Load RPM code into memory and trigger its execution. */
+void start_rpm(void);
+
 #endif