[coreboot-gerrit] New patch to review for coreboot: f1946b0 storm: add code for detecting rec/dev/write protect switches' status
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Tue Apr 14 15:31:51 CEST 2015
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9681
-gerrit
commit f1946b0a0213cc2123c599af935d25915a80e190
Author: Daisuke Nojiri <dnojiri at chromium.org>
Date: Wed Nov 12 14:44:13 2014 -0800
storm: add code for detecting rec/dev/write protect switches' status
The gpio access code has been moved to a separate file to match other
platforms. Accessor functions are added to read different switches
state. They will be read by verstage, when it is enabled, and by
ramstage, for passing the values to depthcharge.
It is unfortunate that the gpio values are not being cached and can
change by the time CBMEM table is filled, but we have to live with
that for now.
BUG=chrome-os-partner:33756,chrome-os-partner:34161
BRANCH=storm
TEST=none yet.
Change-Id: I229fed0e35d643912f929671d5fc25aee5d1d167
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: 7e15aa281a1dbf2c463650b6c04991436022d8d4
Original-Signed-off-by: Daisuke Nojiri <dnojiri at chromium.org>
Original-Change-Id: I940b54cd3cf046b94d57d59d370e634a70a8bbeb
Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/229426
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
src/mainboard/google/storm/Makefile.inc | 1 +
src/mainboard/google/storm/chromeos.c | 71 +++++++++++++++++++++++++++++++++
src/mainboard/google/storm/mainboard.c | 26 ------------
3 files changed, 72 insertions(+), 26 deletions(-)
diff --git a/src/mainboard/google/storm/Makefile.inc b/src/mainboard/google/storm/Makefile.inc
index 5add3b3..aace929 100644
--- a/src/mainboard/google/storm/Makefile.inc
+++ b/src/mainboard/google/storm/Makefile.inc
@@ -28,6 +28,7 @@ romstage-y += reset.c
ramstage-y += boardid.c
ramstage-y += cdp.c
+ramstage-y += chromeos.c
ramstage-y += mainboard.c
ramstage-y += reset.c
diff --git a/src/mainboard/google/storm/chromeos.c b/src/mainboard/google/storm/chromeos.c
new file mode 100644
index 0000000..5913c3f
--- /dev/null
+++ b/src/mainboard/google/storm/chromeos.c
@@ -0,0 +1,71 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <boot/coreboot_tables.h>
+#include <console/console.h>
+#include <delay.h>
+#include <gpio.h>
+#include <string.h>
+#include <vendorcode/google/chromeos/chromeos.h>
+
+#define DEV_SW 15
+#define DEV_POL ACTIVE_LOW
+#define REC_SW 16
+#define REC_POL ACTIVE_LOW
+#define WP_SW 17
+#define WP_POL ACTIVE_LOW
+
+static int read_gpio(gpio_t gpio_num)
+{
+ gpio_tlmm_config_set(gpio_num, GPIO_FUNC_DISABLE,
+ GPIO_NO_PULL, GPIO_2MA, GPIO_DISABLE);
+ udelay(10); /* Should be enough to settle. */
+ return gpio_get(gpio_num);
+}
+
+void fill_lb_gpios(struct lb_gpios *gpios)
+{
+ struct lb_gpio *gpio;
+ const int GPIO_COUNT = 5;
+
+ gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio));
+ gpios->count = GPIO_COUNT;
+
+ gpio = gpios->gpios;
+ fill_lb_gpio(gpio++, DEV_SW, ACTIVE_LOW, "developer", read_gpio(DEV_SW));
+ fill_lb_gpio(gpio++, REC_SW, ACTIVE_LOW, "recovery", read_gpio(REC_SW));
+ fill_lb_gpio(gpio++, WP_SW, ACTIVE_LOW, "write protect", read_gpio(WP_SW));
+ fill_lb_gpio(gpio++, -1, ACTIVE_LOW, "power", 1);
+ fill_lb_gpio(gpio++, -1, ACTIVE_LOW, "lid", 0);
+}
+
+int get_developer_mode_switch(void)
+{
+ return read_gpio(DEV_SW) ^ !DEV_POL;
+}
+
+int get_recovery_mode_switch(void)
+{
+ return read_gpio(REC_SW) ^ !REC_POL;
+}
+
+int get_write_protect_state(void)
+{
+ return read_gpio(WP_SW) ^ !WP_POL;
+}
diff --git a/src/mainboard/google/storm/mainboard.c b/src/mainboard/google/storm/mainboard.c
index 69aecb1..3ed2c7f 100644
--- a/src/mainboard/google/storm/mainboard.c
+++ b/src/mainboard/google/storm/mainboard.c
@@ -20,13 +20,11 @@
#include <arch/cache.h>
#include <boardid.h>
#include <boot/coreboot_tables.h>
-#include <console/console.h>
#include <delay.h>
#include <device/device.h>
#include <gpio.h>
#include <soc/clock.h>
#include <soc/usb.h>
-#include <string.h>
#include <symbols.h>
#include <vendorcode/google/chromeos/chromeos.h>
@@ -149,27 +147,3 @@ void lb_board(struct lb_header *header)
lb_table_add_macs_from_vpd(header);
#endif
}
-
-static int read_gpio(gpio_t gpio_num)
-{
- gpio_tlmm_config_set(gpio_num, GPIO_FUNC_DISABLE,
- GPIO_NO_PULL, GPIO_2MA, GPIO_DISABLE);
- udelay(10); /* Should be enough to settle. */
- return gpio_get(gpio_num);
-}
-
-void fill_lb_gpios(struct lb_gpios *gpios)
-{
- struct lb_gpio *gpio;
- const int GPIO_COUNT = 5;
-
- gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio));
- gpios->count = GPIO_COUNT;
-
- gpio = gpios->gpios;
- fill_lb_gpio(gpio++, 15, ACTIVE_LOW, "developer", read_gpio(15));
- fill_lb_gpio(gpio++, 16, ACTIVE_LOW, "recovery", read_gpio(16));
- fill_lb_gpio(gpio++, 17, ACTIVE_LOW, "write protect", read_gpio(17));
- fill_lb_gpio(gpio++, -1, ACTIVE_LOW, "power", 1);
- fill_lb_gpio(gpio++, -1, ACTIVE_LOW, "lid", 0);
-}
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