[coreboot-gerrit] Patch set updated for coreboot: 66dce31 veyron_rialto: Fix boot failure in romstage.

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9656

-gerrit

commit 66dce3171d2b29bd57df9ee0f29e5b00a44041b6
Author: Hung-Te Lin <hungte at chromium.org>
Date:   Fri Jan 30 14:57:20 2015 +0800

    veyron_rialto: Fix boot failure in romstage.
    
    The FMAP for Rialto has no ecrwhash and would cause verstage to
    incorrectly load ramstage (instead of romstage) when looking for
    subsection inside RW blob.
    
    We have to override the index of stages to boot correctly.
    
    BRANCH=veyron_rialto
    BUG=none
    TEST=emerge-veyron_rialto coreboot chromeos-bootimage
         Boots successfully on Rialto boards.
    
    Change-Id: I031703d97a68e42dc17630ab5df85f8cba47e5e5
    Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
    Original-Commit-Id: 24ba4b16b4a2fe5469296f8d40286ed926cefc3c
    Original-Change-Id: I637ea23e1e8265781e52367d1306dbf854c2ccad
    Original-Signed-off-by: Hung-Te Lin <hungte at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/244577
    Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
---
 src/mainboard/google/veyron_rialto/Kconfig | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/google/veyron_rialto/Kconfig b/src/mainboard/google/veyron_rialto/Kconfig
index 100e9ab..40b5c39 100644
--- a/src/mainboard/google/veyron_rialto/Kconfig
+++ b/src/mainboard/google/veyron_rialto/Kconfig
@@ -49,9 +49,16 @@ config MAINBOARD_VENDOR
 	string
 	default "Google"
 
+# The 'ecrwhash' is removed from FMAP on Rialto, since we don't have EC.
+# As a result, we have to hack RAMSTAGE and ROMSTAGE index until there are
+# better approaches for vboot2 to find right index.
 config VBOOT_RAMSTAGE_INDEX
 	hex
-	default 0x3
+	default 0x2
+
+config VBOOT_ROMSTAGE_INDEX
+	hex
+	default 0x1
 
 config BOOT_MEDIA_SPI_BUS
         int