[coreboot-gerrit] Patch set updated for coreboot: ebfb662 brain: remove sdmmc_power_off() in romstage

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9648

-gerrit

commit ebfb662aee31503097bcfb9b9ddb2312afb5f190
Author: David Hendricks <dhendrix at chromium.org>
Date:   Fri Jan 16 17:42:08 2015 -0800

    brain: remove sdmmc_power_off() in romstage
    
    LDO4 and LDO5 are not turned on with the boot0 and boot1 RK808
    strappings that we use on Brain.
    
    BUG=none
    BRANCH=none
    TEST=built and booted on brain
    
    Change-Id: I00393ca54958d9fff926606405edcd84901e4048
    Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
    Original-Commit-Id: c4c1862585fd058a8a9c8237c701b3bbf3b8aa83
    Original-Signed-off-by: David Hendricks <dhendrix at chromium.org>
    Original-Change-Id: I846ef9d67a780cc07414d545524b9ec0b8490cf1
    Original-Reviewed-on: https://chromium-review.googlesource.com/241734
    Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
---
 src/mainboard/google/veyron_brain/romstage.c | 9 ---------
 1 file changed, 9 deletions(-)

diff --git a/src/mainboard/google/veyron_brain/romstage.c b/src/mainboard/google/veyron_brain/romstage.c
index 1eed268..3f9e7aa 100644
--- a/src/mainboard/google/veyron_brain/romstage.c
+++ b/src/mainboard/google/veyron_brain/romstage.c
@@ -77,12 +77,6 @@ static void configure_l2ctlr(void)
 	write_l2ctlr(l2ctlr);
 }
 
-static void sdmmc_power_off(void)
-{
-	rk808_configure_ldo(4, 0); /* VCCIO_SD */
-	rk808_configure_ldo(5, 0); /* VCC33_SD */
-}
-
 void main(void)
 {
 #if CONFIG_COLLECT_TIMESTAMPS
@@ -97,9 +91,6 @@ void main(void)
 	configure_l2ctlr();
 	tsadc_init();
 
-	/* Need to power cycle SD card to ensure it is properly reset. */
-	sdmmc_power_off();
-
 	/* vdd_log 1200mv is enough for ddr run 666Mhz */
 	regulate_vdd_log(1200);
 #if CONFIG_COLLECT_TIMESTAMPS