[coreboot-gerrit] Patch merged into coreboot/master: 36fd82d nyan/rush/veyron: Align ChromeOS GPIOs to new model

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 36fd82dfc4523adc08cce5d553b8ae8575e77ab5
Author: Julius Werner <jwerner at chromium.org>
Date:   Thu Nov 20 17:02:17 2014 -0800

    nyan/rush/veyron: Align ChromeOS GPIOs to new model
    
    This CL makes slight changes to the ChromeOS-specific GPIO definitions
    of Tegra and Rockchip boards to prepare them for new features in
    depthcharge. It adds descriptions for the EC in RW and reset GPIOs,
    changes the value Tegra writes into the (previously unused) 'port' field
    to describe the complete GPIO information, and removes code to sample
    some GPIOs that don't need to be sampled at coreboot time (to help
    depthcharge detect errors and avoid using a stale value for something
    that should always represent the current state).
    
    BRANCH=None
    BUG=None
    TEST=None (tested together with depthcharge patches)
    
    Change-Id: I3774979dbe7cacce4932c85810596d80e5664028
    Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
    Original-Commit-Id: df295d0432fbf623597cf36ebb170bd4f63ee08d
    Original-Change-Id: I36bb16c8d931f862bf12a5b862b10cf18d738ddd
    Original-Signed-off-by: Julius Werner <jwerner at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/231222
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: http://review.coreboot.org/9570
    Tested-by: build bot (Jenkins)
    Reviewed-by: Patrick Georgi <pgeorgi at google.com>


See http://review.coreboot.org/9570 for details.

-gerrit