[coreboot-gerrit] Patch merged into coreboot/master: ba9b7bf baytrail: add code for supporting 2x ddr refresh rate

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit ba9b7bfc6f4b6622fa2d272faeb32b7135287ee6
Author: Kane Chen <kane.chen at intel.com>
Date:   Sat Jan 17 08:19:54 2015 +0800

    baytrail: add code for supporting 2x ddr refresh rate
    
    this code change provides a way to enable 2x refresh rate
    in RW image
    In baytrail, it enables 2x refresh rate by default
    
    BUG=chrome-os-partner:35210
    BRANCH=none
    TEST=check the register is set properly on rambi
    
    Change-Id: I2a935b570c564986898b6c2064fc7ad43506dcba
    Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
    Original-Commit-Id: c740d403708862514be9fa24f56b2764328979eb
    Original-Change-Id: I84f33d75ea7ebfea180b304e8ff683884f0dbe8a
    Original-Signed-off-by: Kane Chen <kane.chen at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/241754
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: http://review.coreboot.org/9498
    Tested-by: build bot (Jenkins)
    Reviewed-by: Patrick Georgi <pgeorgi at google.com>


See http://review.coreboot.org/9498 for details.

-gerrit