[coreboot-gerrit] New patch to review for coreboot: cc6b725 veyron: Change VCC10_LCD_PWREN_H to allowed maximum of 2.5V

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9547

-gerrit

commit cc6b72536667707c1466c4b684b03ed11faa590d
Author: Julius Werner <jwerner at chromium.org>
Date:   Thu Nov 6 14:33:12 2014 -0800

    veyron: Change VCC10_LCD_PWREN_H to allowed maximum of 2.5V
    
    LDO7 (VCC10_LCD_PWREN_H) is essentially just a glorified GPIO that turns
    the real VCC10 regulator on or off. We tried setting it to 3.3V since it
    matches the VCC33_SYS voltage on the input of that regulator. However,
    we didn't notice that the LDO only supports going up to 2.5V.
    
    This patch changes the voltage to the allowed maximum, which should
    still work fine as an enable line (and is the same value used by the
    kernel). This removes an assertion error in the ramstage.
    
    Also change the PMIC driver to assert maximum VSEL values based on the
    LDO, because the lower-voltage ones support one more setting. (LDO3 is
    actually listed to only go up to 0b1111 in the manual, and has a weird
    jump from 0b1101 -> 2.2V (skipping over 0b1110) to 0b1111 -> 2.5V. I
    don't know if that's a documentation error or what they were smoking
    when they designed that, but we don't need to care for now.)
    
    BRANCH=None
    BUG=None
    TEST=Booted on Pinky, no more ASSERTION FAILED.
    
    Change-Id: I38bf99e38822fd0883fd4d0bd9a1b01143545a95
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 70f3149efbc3aa9a03ab3fd5be99d17d9c5e1c87
    Original-Change-Id: I68a3bb882cf25d98aca8922ede2a17e1ef6524de
    Original-Signed-off-by: Julius Werner <jwerner at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/228292
    Original-Commit-Queue: Lin Huang <hl at rock-chips.com>
    Original-Tested-by: Lin Huang <hl at rock-chips.com>
    Original-Reviewed-by: Jerry Parson <jwp at chromium.org>
---
 src/mainboard/google/veyron_jerry/mainboard.c | 2 +-
 src/mainboard/google/veyron_pinky/mainboard.c | 2 +-
 src/soc/rockchip/rk3288/rk808.c               | 3 ++-
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/mainboard/google/veyron_jerry/mainboard.c b/src/mainboard/google/veyron_jerry/mainboard.c
index b641fad..e6a90b9 100644
--- a/src/mainboard/google/veyron_jerry/mainboard.c
+++ b/src/mainboard/google/veyron_jerry/mainboard.c
@@ -91,7 +91,7 @@ static void configure_lcd(void)
 	writel(IOMUX_LCDC, &rk3288_grf->iomux_lcdc);
 
 	rk808_configure_switch(PMIC_BUS, 2, 1);	/* VCC18_LCD */
-	rk808_configure_ldo(PMIC_BUS, 7, 3300); /* VCC10_LCD_PWREN_H */
+	rk808_configure_ldo(PMIC_BUS, 7, 2500); /* VCC10_LCD_PWREN_H */
 	rk808_configure_switch(PMIC_BUS, 1, 1);	/* VCC33_LCD */
 
 	gpio_output(GPIO(7, A, 0), 0);			/* LCDC_BL */
diff --git a/src/mainboard/google/veyron_pinky/mainboard.c b/src/mainboard/google/veyron_pinky/mainboard.c
index 0166796..f891e21 100644
--- a/src/mainboard/google/veyron_pinky/mainboard.c
+++ b/src/mainboard/google/veyron_pinky/mainboard.c
@@ -121,7 +121,7 @@ static void configure_lcd(void)
 		break;
 	default:
 		rk808_configure_switch(PMIC_BUS, 2, 1);	/* VCC18_LCD */
-		rk808_configure_ldo(PMIC_BUS, 7, 3300); /* VCC10_LCD_PWREN_H */
+		rk808_configure_ldo(PMIC_BUS, 7, 2500); /* VCC10_LCD_PWREN_H */
 		rk808_configure_switch(PMIC_BUS, 1, 1);	/* VCC33_LCD */
 		break;
 	}
diff --git a/src/soc/rockchip/rk3288/rk808.c b/src/soc/rockchip/rk3288/rk808.c
index fea64e5..fffef89 100644
--- a/src/soc/rockchip/rk3288/rk808.c
+++ b/src/soc/rockchip/rk3288/rk808.c
@@ -60,16 +60,17 @@ void rk808_configure_ldo(uint8_t bus, int ldo, int millivolts)
 	case 5:
 	case 8:
 		vsel = div_round_up(millivolts, 100) - 18;
+		assert(vsel <= 0x10);
 		break;
 	case 3:
 	case 6:
 	case 7:
 		vsel = div_round_up(millivolts, 100) - 8;
+		assert(vsel <= 0x11);
 		break;
 	default:
 		die("Unknown LDO index!");
 	}
-	assert(vsel <= 0x10);
 
 	rk808_clrsetbits(bus, LDO_ONSEL(ldo), 0x1f, vsel);
 	rk808_clrsetbits(bus, LDO_EN, 0, 1 << (ldo - 1));