[coreboot-gerrit] Patch set updated for coreboot: bcfb860 arm64: Add function for reading TCR register at current EL

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9537

-gerrit

commit bcfb8603087fd9a80e242b0590e1350a1ef5b905
Author: Furquan Shaikh <furquan at google.com>
Date:   Fri Nov 21 15:27:05 2014 -0800

    arm64: Add function for reading TCR register at current EL
    
    TCR at EL1 is 64-bit whereas at EL2 and EL3 it is 32-bit. Thus, use 64-bit
    variables to read / write TCR at current EL. raw_read_tcr_elx will handle it
    automatically by accepting / returning 32-bit / 64-bit values.
    
    BUG=chrome-os-partner:33962
    BRANCH=None
    TEST=Compiles and boots to kernel prompt.
    
    Change-Id: I96312e62a67f482f4233c524ea4e22cbbb60941a
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: ae71f87143f899383d8311a4ef908908116340d7
    Original-Signed-off-by: Furquan Shaikh <furquan at google.com>
    Original-Change-Id: I459914808b69318157113504a3ee7cf6c5f4d8d1
    Original-Reviewed-on: https://chromium-review.googlesource.com/231548
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Tested-by: Furquan Shaikh <furquan at chromium.org>
    Original-Commit-Queue: Furquan Shaikh <furquan at chromium.org>
---
 src/arch/arm64/armv8/lib/sysctrl.c              | 28 +++++++++++++++++++++++++
 src/arch/arm64/include/armv8/arch/lib_helpers.h |  4 ++++
 2 files changed, 32 insertions(+)

diff --git a/src/arch/arm64/armv8/lib/sysctrl.c b/src/arch/arm64/armv8/lib/sysctrl.c
index 444d6c7..d783509 100644
--- a/src/arch/arm64/armv8/lib/sysctrl.c
+++ b/src/arch/arm64/armv8/lib/sysctrl.c
@@ -879,6 +879,34 @@ void raw_write_tcr_el3(uint32_t tcr_el3)
 	__asm__ __volatile__("msr TCR_EL3, %0\n\t" : : "r" (tcr_el3) : "memory");
 }
 
+
+/*
+ * IMPORTANT: TCR_EL1 is 64-bit whereas TCR_EL2 and TCR_EL3 are 32-bit. Thus,
+ * 64-bit is used to read/write for tcr_current. tcr_el2 and tcr_el3 handle them
+ * with appropriate 32-bit types.
+ */
+uint64_t raw_read_tcr_current(void)
+{
+	uint32_t el = get_current_el();
+	return raw_read_tcr(el);
+}
+
+void raw_write_tcr_current(uint64_t tcr)
+{
+	uint32_t el = get_current_el();
+	raw_write_tcr(tcr, el);
+}
+
+uint64_t raw_read_tcr(uint32_t el)
+{
+	SWITCH_CASE_READ(raw_read_tcr, tcr, uint64_t, el);
+}
+
+void raw_write_tcr(uint64_t tcr, uint32_t el)
+{
+	SWITCH_CASE_WRITE(raw_write_tcr, tcr, el);
+}
+
 /* TTBR0 */
 uint64_t raw_read_ttbr0_el1(void)
 {
diff --git a/src/arch/arm64/include/armv8/arch/lib_helpers.h b/src/arch/arm64/include/armv8/arch/lib_helpers.h
index 248a1ea..a804747 100644
--- a/src/arch/arm64/include/armv8/arch/lib_helpers.h
+++ b/src/arch/arm64/include/armv8/arch/lib_helpers.h
@@ -459,6 +459,10 @@ uint32_t raw_read_tcr_el2(void);
 void raw_write_tcr_el2(uint32_t tcr_el2);
 uint32_t raw_read_tcr_el3(void);
 void raw_write_tcr_el3(uint32_t tcr_el3);
+uint64_t raw_read_tcr_current(void);
+void raw_write_tcr_current(uint64_t tcr);
+uint64_t raw_read_tcr(uint32_t el);
+void raw_write_tcr(uint64_t tcr, uint32_t el);
 uint64_t raw_read_ttbr0_el1(void);
 void raw_write_ttbr0_el1(uint64_t ttbr0_el1);
 uint64_t raw_read_ttbr0_el2(void);