[coreboot-gerrit] Patch set updated for coreboot: 5a08b7c arm64: psci: actually inform SoC layer of CPU_ON entry

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Fri Apr 10 15:00:05 CEST 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9530

-gerrit

commit 5a08b7c0fd8f3dc59a787fe54f731e426ac975c9
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Tue Nov 25 17:23:22 2014 -0600

    arm64: psci: actually inform SoC layer of CPU_ON entry
    
    psci_soc_init() was added to allow SoC PSCI initialization.
    However, actually calling said function was omitted accidentally.
    
    BUG=chrome-os-partner:32136
    BRANCH=None
    TEST=Built and noted correct on entry point was used.
    
    Change-Id: I84a397e2dabf149fe8f252ef69d0a7362fa1f194
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 2a0e6ad41f049bbab483423231db59390894e9b2
    Original-Change-Id: I1a4e25fde64ecdc98fa9231f7d9cafc21119630d
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/231935
    Original-Reviewed-by: Furquan Shaikh <furquan at chromium.org>
---
 src/arch/arm64/armv8/secmon/psci.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/arch/arm64/armv8/secmon/psci.c b/src/arch/arm64/armv8/secmon/psci.c
index 3ba7e73..6047abd 100644
--- a/src/arch/arm64/armv8/secmon/psci.c
+++ b/src/arch/arm64/armv8/secmon/psci.c
@@ -565,4 +565,7 @@ void psci_init(uintptr_t cpu_on_entry)
 	/* Register PSCI handlers. */
 	if (smc_register_range(PSCI_CPU_OFF64, PSCI_CPU_ON64, &psci_handler))
 		printk(BIOS_ERR, "Couldn't register PSCI handler.\n");
+
+	/* Inform SoC layer of CPU_ON entry point. */
+	psci_soc_init(cpu_on_entry);
 }



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