[coreboot-gerrit] Patch set updated for coreboot: be83a5b arm64: secmon: prepare for passing more state into secmon

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9395

-gerrit

commit be83a5b0889ff813e00bda1bb48a699809a66ff3
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed Nov 5 10:48:16 2014 -0600

    arm64: secmon: prepare for passing more state into secmon
    
    The current implementation of secmon assumes just entry/arg
    are passed to secmon for starting up a CPU. That's lacking
    in flexibility. Therefore change secmon_params to contain
    both the BSP and secondary CPUs' entry/arg information.
    That way more information can be added to secmon_params when
    needed.
    
    BUG=chrome-os-partner:32112
    BRANCH=None
    TEST=Built and booted SMP kernel using PSCI and spin table.
    
    Change-Id: I84c478ccefdfa4580fcc078a2491f49f86a9757a
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: c5fb5bd857a4318174f5b9b48e28406e60a466f8
    Original-Change-Id: Iafb82d5cabc806b6625799a6b3dff8d77bdb27e9
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/227548
    Original-Reviewed-by: Furquan Shaikh <furquan at chromium.org>
---
 src/arch/arm64/armv8/secmon/secmon_init.c  | 22 ++++++++-------
 src/arch/arm64/armv8/secmon_loader.c       | 43 +++++++++++++++++-------------
 src/arch/arm64/include/armv8/arch/secmon.h |  4 +--
 3 files changed, 39 insertions(+), 30 deletions(-)

diff --git a/src/arch/arm64/armv8/secmon/secmon_init.c b/src/arch/arm64/armv8/secmon/secmon_init.c
index fb3422f..8fd3917 100644
--- a/src/arch/arm64/armv8/secmon/secmon_init.c
+++ b/src/arch/arm64/armv8/secmon/secmon_init.c
@@ -30,16 +30,21 @@
 #include <stddef.h>
 #include "secmon.h"
 
-/* Save initial secmon params per CPU to handle turn up. */
-static struct secmon_params *init_params[CONFIG_MAX_CPUS];
-
 static void start_up_cpu(void *arg)
 {
-	struct secmon_params *params = init_params[cpu_info()->id];
+	struct secmon_params *params = arg;
+	struct cpu_action *action;
+
+	if (cpu_is_bsp())
+		action = &params->bsp;
+	else
+		action = &params->secondary;
+
 
-	if (params == NULL)
+	if (action->run == NULL)
 		psci_turn_off_self();
-	psci_turn_on_self(params->entry, params->arg);
+
+	psci_turn_on_self(action->run, action->arg);
 }
 
 static void cpu_init(int bsp)
@@ -75,13 +80,12 @@ static void secmon_init(struct secmon_params *params, int bsp)
 {
 	struct cpu_action action = {
 		.run = start_up_cpu,
+		.arg = params,
 	};
 
 	exception_hwinit();
 	cpu_init(bsp);
 
-	init_params[cpu_info()->id] = params;
-
 	if (!cpu_is_bsp())
 		secmon_wait_for_action();
 
@@ -94,7 +98,7 @@ static void secmon_init(struct secmon_params *params, int bsp)
 	/* Make sure all non-BSP CPUs take action before the BSP. */
 	arch_run_on_all_cpus_but_self_async(&action);
 	/* Turn on BSP. */
-	start_up_cpu(NULL);
+	start_up_cpu(params);
 
 	printk(BIOS_ERR, "CPU turn on failed for BSP.\n");
 	while (1)
diff --git a/src/arch/arm64/armv8/secmon_loader.c b/src/arch/arm64/armv8/secmon_loader.c
index 0098228..59a6ba7 100644
--- a/src/arch/arm64/armv8/secmon_loader.c
+++ b/src/arch/arm64/armv8/secmon_loader.c
@@ -79,26 +79,22 @@ static secmon_entry_t secmon_load_rmodule(void)
 
 struct secmon_runit {
 	secmon_entry_t entry;
-	struct secmon_params bsp_params;
-	struct secmon_params secondary_params;
+	struct secmon_params params;
 };
 
 static void secmon_start(void *arg)
 {
 	uint32_t scr;
 	secmon_entry_t entry;
-	struct secmon_params *p = NULL;
+	struct secmon_params *p;
 	struct secmon_runit *r = arg;
 
 	entry = r->entry;
+	p = &r->params;
 
-	if (cpu_is_bsp())
-		p = &r->bsp_params;
-	else {
+	/* Obtain secondary entry point for non-BSP CPUs. */
+	if (!cpu_is_bsp())
 		entry = secondary_entry_point(entry);
-		if (r->secondary_params.entry != NULL)
-			p = &r->secondary_params;
-	}
 
 	printk(BIOS_DEBUG, "CPU%x entering secure monitor %p.\n",
 		cpu_info()->id, entry);
@@ -113,9 +109,26 @@ static void secmon_start(void *arg)
 	entry(p);
 }
 
-void secmon_run(void (*entry)(void *), void *cb_tables)
+static void fill_secmon_params(struct secmon_params *p,
+				void (*bsp_entry)(void *), void *bsp_arg)
 {
 	const struct spintable_attributes *spin_attrs;
+
+	memset(p, 0, sizeof(*p));
+
+	spin_attrs = spintable_get_attributes();
+
+	if (spin_attrs != NULL) {
+		p->secondary.run = spin_attrs->entry;
+		p->secondary.arg = spin_attrs->addr;
+	}
+
+	p->bsp.run = bsp_entry;
+	p->bsp.arg = bsp_arg;
+}
+
+void secmon_run(void (*entry)(void *), void *cb_tables)
+{
 	static struct secmon_runit runit;
 	struct cpu_action action = {
 		.run = secmon_start,
@@ -137,15 +150,7 @@ void secmon_run(void (*entry)(void *), void *cb_tables)
 	printk(BIOS_DEBUG, "ARM64: Loaded the el3 monitor...jumping to %p\n",
 	       runit.entry);
 
-	runit.bsp_params.entry = entry;
-	runit.bsp_params.arg = cb_tables;
-
-	spin_attrs = spintable_get_attributes();
-
-	if (spin_attrs != NULL) {
-		runit.secondary_params.entry = spin_attrs->entry;
-		runit.secondary_params.arg = spin_attrs->addr;
-	}
+	fill_secmon_params(&runit.params, entry, cb_tables);
 
 	arch_run_on_all_cpus_but_self_async(&action);
 	secmon_start(&runit);
diff --git a/src/arch/arm64/include/armv8/arch/secmon.h b/src/arch/arm64/include/armv8/arch/secmon.h
index 12dd8c4..dc4b2e0 100644
--- a/src/arch/arm64/include/armv8/arch/secmon.h
+++ b/src/arch/arm64/include/armv8/arch/secmon.h
@@ -25,8 +25,8 @@
 #if IS_ENABLED(CONFIG_ARCH_USE_SECURE_MONITOR)
 
 struct secmon_params {
-	void (*entry)(void *);
-	void *arg;
+	struct cpu_action bsp;
+	struct cpu_action secondary;
 };
 
 void secmon_run(void (*entry)(void *), void *arg);