[coreboot-gerrit] Patch merged into coreboot/master: db3f383 tegra132: configure debug uart to 115200n8 in tegra_lp0_resume
gerrit at coreboot.org
gerrit at coreboot.org
Thu Apr 9 14:40:19 CEST 2015
the following patch was just integrated into master:
commit db3f383494053535e3f0e19ea1346c8084ee54eb
Author: Yen Lin <yelin at nvidia.com>
Date: Wed Oct 29 17:42:47 2014 -0700
tegra132: configure debug uart to 115200n8 in tegra_lp0_resume
Need to configure debug uart port to have proper baudrate/width/parity.
Hard-code it to 115200n8.
BUG=chrome-os-partner:32015
BRANCH=None
TEST=successfully suspend/resume on Rush/Ryu
Change-Id: I502fd8361baf2bea642fabbc4d5e126da5411ba3
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: 8c70625ad41efca9117c8682113b226e929e93c5
Original-Change-Id: I6a96c80654ce52f5b877fd46995ca8c1aceb7017
Original-Signed-off-by: Yen Lin <yelin at nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/226407
Original-Reviewed-by: Tom Warren <twarren at nvidia.com>
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: http://review.coreboot.org/9391
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan at google.com>
See http://review.coreboot.org/9391 for details.
-gerrit
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