[coreboot-gerrit] New patch to review for coreboot: c3d4b4e tegra132: Add routine to enable all audio periphs under AHUB

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9428

-gerrit

commit c3d4b4ea2213acd5b2f6cd5a9add418b36ab260e
Author: Tom Warren <twarren at nvidia.com>
Date:   Fri Nov 14 15:42:42 2014 -0700

    tegra132: Add routine to enable all audio periphs under AHUB
    
    If all devices under AHUB (AUDIO/I2S/DAM/ADX/etc) aren't
    clocked and taken out of reset, any access to any audio
    peripheral will hang the system.
    
    BUG=none
    BRANCH=none
    TEST=built both Rush and Ryu OK.
    
    Change-Id: Iee8e33f005c5abaf09a14104c0b243b06eb4af24
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 0016bd533864942225f2fb8e08ce871a186f2746
    Original-Change-Id: I741d5ba4dd8bd963b6d261fbf41cfb77c274cb79
    Original-Signed-off-by: Tom Warren <twarren at nvidia.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/229910
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Commit-Queue: Mike Frysinger <vapier at chromium.org>
---
 src/soc/nvidia/tegra132/clock.c             | 18 ++++++++++++++++++
 src/soc/nvidia/tegra132/include/soc/clock.h |  1 +
 2 files changed, 19 insertions(+)

diff --git a/src/soc/nvidia/tegra132/clock.c b/src/soc/nvidia/tegra132/clock.c
index 0d37851..49c2f19 100644
--- a/src/soc/nvidia/tegra132/clock.c
+++ b/src/soc/nvidia/tegra132/clock.c
@@ -709,3 +709,21 @@ void clock_reset_x(u32 bit)
 	clock_reset_dev(CLK_RST_REG(rst_dev_x_set), CLK_RST_REG(rst_dev_x_clr),
 			bit);
 }
+
+/* Enable/unreset all audio toys under AHUB */
+void clock_enable_audio(void)
+{
+	/*
+	 * Confirmed by NVIDIA hardware team, we need to take ALL audio devices
+	 * connected to AHUB (AUDIO, APBIF, I2S, DAM, AMX, ADX, SPDIF, AFC) out
+	 * of reset and clock-enabled, otherwise reading AHUB devices (in our
+	 * case, I2S/APBIF/AUDIO<XBAR>) will hang.
+	 */
+	clock_enable_clear_reset(CLK_L_I2S0 | CLK_L_I2S1 | CLK_L_I2S2 | CLK_L_SPDIF,
+				 0, 0,
+				 CLK_V_I2S3 | CLK_V_I2S4 | CLK_V_AUDIO | CLK_V_APBIF |
+				 CLK_V_DAM0 | CLK_V_DAM1 | CLK_V_DAM2 | CLK_V_EXTPERIPH1,
+				 CLK_W_AMX0 | CLK_W_ADX0,
+				 CLK_X_ADX1 | CLK_X_AFC0 | CLK_X_AFC1 | CLK_X_AFC2 |
+				 CLK_X_AFC3 | CLK_X_AFC4 | CLK_X_AFC5 | CLK_X_AMX1);
+}
diff --git a/src/soc/nvidia/tegra132/include/soc/clock.h b/src/soc/nvidia/tegra132/include/soc/clock.h
index 0f01182..f0d05e1 100644
--- a/src/soc/nvidia/tegra132/include/soc/clock.h
+++ b/src/soc/nvidia/tegra132/include/soc/clock.h
@@ -394,6 +394,7 @@ void clock_init(void);
 void clock_init_arm_generic_timer(void);
 void sor_clock_stop(void);
 void sor_clock_start(void);
+void clock_enable_audio(void);
 
 #endif /* __SOC_NVIDIA_TEGRA132_CLOCK_H__ */