[coreboot-gerrit] Patch set updated for coreboot: 760887f pistachio: set correct CBMEM top address

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9191

-gerrit

commit 760887ff0dac2c1eebb1e0067d807ec28d5a032c
Author: Vadim Bendebury <vbendeb at chromium.org>
Date:   Sat Nov 29 15:31:40 2014 -0800

    pistachio: set correct CBMEM top address
    
    This is required for proper dynamic CBMEM operation.
    
    BRANCH=none
    BUG=chrome-os-partner:31438
    TEST=urara ramstage does not crash anymore in CBMEM initialization
    
    Change-Id: Id8e001be20fc245c91b2639f89775e594b0de966
    Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
    Original-Commit-Id: b7c6e4090d76a172c269bff002428015cc8aac8a
    Original-Change-Id: I5d44907443724891c8cff805208a7a3bb8e36752
    Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/232292
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/soc/imgtec/pistachio/cbmem.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/soc/imgtec/pistachio/cbmem.c b/src/soc/imgtec/pistachio/cbmem.c
index 373d4f8..1aed030 100644
--- a/src/soc/imgtec/pistachio/cbmem.c
+++ b/src/soc/imgtec/pistachio/cbmem.c
@@ -25,6 +25,5 @@
 
 void *cbmem_top(void)
 {
-	uintptr_t top = MIN(CONFIG_DRAM_SIZE_MB, 256) << 20;
-	return _dram + top;
+	return _dram + (CONFIG_DRAM_SIZE_MB << 20);
 }