[coreboot-gerrit] New patch to review for coreboot: 561b237 cosmos: enable SOC uart driver

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Tue Apr 7 14:09:23 CEST 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9354

-gerrit

commit 561b2377ada1328e01729f7fa4ea017378ad97a8
Author: Vadim Bendebury <vbendeb at chromium.org>
Date:   Wed Oct 15 16:32:05 2014 -0700

    cosmos: enable SOC uart driver
    
    Add necessary configuration to enable the inclusion of the UART driver
    into the image when serial console is enabled.
    
    BRANCH=none
    BUG=chrome-os-partner:32631
    TEST=building with serial console enabled includes the skeleton uart
         driver into the build
    
    Change-Id: I9ef14c93fd4534ba3d6c6bafdf908cb7f1a3b14b
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 3b49c258910af63d51feca3c461d589d0a41221e
    Original-Change-Id: I6cbd110f600169021901b3f864d596404587fbcc
    Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/223598
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/soc/marvell/bg4cd/Kconfig      | 2 ++
 src/soc/marvell/bg4cd/Makefile.inc | 4 ++++
 2 files changed, 6 insertions(+)

diff --git a/src/soc/marvell/bg4cd/Kconfig b/src/soc/marvell/bg4cd/Kconfig
index 759ba46..8906402 100644
--- a/src/soc/marvell/bg4cd/Kconfig
+++ b/src/soc/marvell/bg4cd/Kconfig
@@ -30,6 +30,8 @@ config SOC_MARVELL_BG4CD
 	select EARLY_CONSOLE
 	select GENERIC_UDELAY
 	select HAVE_MONOTONIC_TIMER
+	select HAVE_UART_MEMORY_MAPPED
+	select HAVE_UART_SPECIAL
 
 if SOC_MARVELL_BG4CD
 
diff --git a/src/soc/marvell/bg4cd/Makefile.inc b/src/soc/marvell/bg4cd/Makefile.inc
index 3be5f63..7367c3d 100644
--- a/src/soc/marvell/bg4cd/Makefile.inc
+++ b/src/soc/marvell/bg4cd/Makefile.inc
@@ -22,21 +22,25 @@ bootblock-y += cbmem.c
 bootblock-y += i2c.c
 bootblock-y += media.c
 bootblock-y += monotonic_timer.c
+bootblock-$(CONFIG_CONSOLE_SERIAL) += uart.c
 
 verstage-y += i2c.c
 verstage-y += media.c
 verstage-y += monotonic_timer.c
+verstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
 
 romstage-y += cbmem.c
 romstage-y += i2c.c
 romstage-y += media.c
 romstage-y += monotonic_timer.c
 romstage-y += sdram.c
+romstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
 
 ramstage-y += cbmem.c
 ramstage-y += i2c.c
 ramstage-y += media.c
 ramstage-y += monotonic_timer.c
+ramstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
 
 $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
 	cp $< $@



More information about the coreboot-gerrit mailing list