[coreboot-gerrit] Patch set updated for coreboot: 286c274 intel/nehalem: rename copypasted smi finalizer function

[Peter Stuge (peter@stuge.se)]

Peter Stuge (peter at stuge.se) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8292

-gerrit

commit 286c274c9695253f7c6a41cff7d256941ac3f4cb
Author: Alexander Couzens <lynxis at fe80.eu>
Date:   Tue Jan 27 11:57:43 2015 +0100

    intel/nehalem: rename copypasted smi finalizer function
    
    The nehalem smi finalize handler was just copied from sandybridge,
    without even changing the function name.
    
    TEST=Built and tested on x201t with additional patch to use finalizers
    
    Change-Id: Ifb44eeaaa6e03556deeb5d12ed1147e02d6d6eb9
    Signed-off-by: Alexander Couzens <lynxis at fe80.eu>
---
 src/mainboard/lenovo/x201/smihandler.c        | 4 ++--
 src/mainboard/packardbell/ms2290/smihandler.c | 4 ++--
 src/northbridge/intel/nehalem/finalize.c      | 2 +-
 src/northbridge/intel/nehalem/nehalem.h       | 2 +-
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/mainboard/lenovo/x201/smihandler.c b/src/mainboard/lenovo/x201/smihandler.c
index 7af613b..d8e7807 100644
--- a/src/mainboard/lenovo/x201/smihandler.c
+++ b/src/mainboard/lenovo/x201/smihandler.c
@@ -25,7 +25,7 @@
 #include "southbridge/intel/ibexpeak/nvs.h"
 #include "southbridge/intel/ibexpeak/pch.h"
 #include "southbridge/intel/ibexpeak/me.h"
-#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <northbridge/intel/nehalem/nehalem.h>
 #include <cpu/intel/model_2065x/model_2065x.h>
 #include <ec/acpi/ec.h>
 #include <pc80/mc146818rtc.h>
@@ -164,7 +164,7 @@ int mainboard_smi_apmc(u8 data)
 
 		intel_me_finalize_smm();
 		intel_pch_finalize_smm();
-		intel_sandybridge_finalize_smm();
+		intel_nehalem_finalize_smm();
 		intel_model_2065x_finalize_smm();
 
 		mainboard_finalized = 1;
diff --git a/src/mainboard/packardbell/ms2290/smihandler.c b/src/mainboard/packardbell/ms2290/smihandler.c
index f04ff90..bbe1597 100644
--- a/src/mainboard/packardbell/ms2290/smihandler.c
+++ b/src/mainboard/packardbell/ms2290/smihandler.c
@@ -25,7 +25,7 @@
 #include "southbridge/intel/ibexpeak/nvs.h"
 #include "southbridge/intel/ibexpeak/pch.h"
 #include "southbridge/intel/ibexpeak/me.h"
-#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <northbridge/intel/nehalem/nehalem.h>
 #include <cpu/intel/model_2065x/model_2065x.h>
 #include <ec/acpi/ec.h>
 #include <pc80/mc146818rtc.h>
@@ -88,7 +88,7 @@ int mainboard_smi_apmc(u8 data)
 
 		intel_me_finalize_smm();
 		intel_pch_finalize_smm();
-		intel_sandybridge_finalize_smm();
+		intel_nehalem_finalize_smm();
 		intel_model_2065x_finalize_smm();
 
 		mainboard_finalized = 1;
diff --git a/src/northbridge/intel/nehalem/finalize.c b/src/northbridge/intel/nehalem/finalize.c
index 401d9ec..72baa48 100644
--- a/src/northbridge/intel/nehalem/finalize.c
+++ b/src/northbridge/intel/nehalem/finalize.c
@@ -24,7 +24,7 @@
 
 #define PCI_DEV_SNB PCI_DEV(0, 0, 0)
 
-void intel_sandybridge_finalize_smm(void)
+void intel_nehalem_finalize_smm(void)
 {
 	pcie_or_config16(PCI_DEV_SNB, 0x50, 1 << 0);	/* GGC */
 	pcie_or_config32(PCI_DEV_SNB, 0x5c, 1 << 0);	/* DPR */
diff --git a/src/northbridge/intel/nehalem/nehalem.h b/src/northbridge/intel/nehalem/nehalem.h
index 73137b2..d79b0b7 100644
--- a/src/northbridge/intel/nehalem/nehalem.h
+++ b/src/northbridge/intel/nehalem/nehalem.h
@@ -588,7 +588,7 @@ struct ied_header {
 #define PCI_DEVICE_ID_IB 0x0154
 
 #ifdef __SMM__
-void intel_sandybridge_finalize_smm(void);
+void intel_nehalem_finalize_smm(void);
 #else /* !__SMM__ */
 int bridge_silicon_revision(void);
 void nehalem_early_initialization(int chipset_type);