[coreboot-gerrit] Patch set updated for coreboot: edb6dcb Baytrail: Fix no_dev_behind_port not executed for RP1/2/3.

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Sat Apr 4 10:45:25 CEST 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9272

-gerrit

commit edb6dcb4ee2b070b1cadb9ef53a1f3ffcd52de58
Author: Kenji Chen <kenji.chen at intel.com>
Date:   Fri Oct 31 00:32:09 2014 -0700

    Baytrail: Fix no_dev_behind_port not executed for RP1/2/3.
    
    BRANCH=master
    BUG=chrome-os-partner:33113
    TEST=Build a image and test on Rambi.
    Signed-off-by: Kenji Chen <kenji.chen at intel.com>
    
    Change-Id: I37add87e6fd3e7ad4eee09b8e0b312a2a89c7948
    Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
    Original-Commit-Id: 59b4c94be46b4397de7cb32726da9fa216e75a4c
    Original-Change-Id: I22c8f9730cc0e1ecc991f2dd7f2a1e7c548a1789
    Original-Reviewed-on: https://chromium-review.googlesource.com/226654
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Commit-Queue: Kenji Chen <kenji.chen at intel.com>
    Original-Tested-by: Kenji Chen <kenji.chen at intel.com>
---
 src/soc/intel/baytrail/pcie.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/soc/intel/baytrail/pcie.c b/src/soc/intel/baytrail/pcie.c
index f80a494..c477e22 100644
--- a/src/soc/intel/baytrail/pcie.c
+++ b/src/soc/intel/baytrail/pcie.c
@@ -198,6 +198,7 @@ static void check_device_present(device_t dev)
 				dev->enabled = 0;
 			}
 		} else {
+			reg_script_run_on_dev(dev, no_dev_behind_port);
 			dev->enabled = 0;
 		}
 	} else if(!dev->enabled) {



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