[coreboot-gerrit] New patch to review for coreboot: e475d6d x86: rename ldscript_failover.ld to failover.ld

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Fri Apr 3 11:03:18 CEST 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9284

-gerrit

commit e475d6d0415a75f9a0eb1235089fd78fe40873e1
Author: Patrick Georgi <pgeorgi at chromium.org>
Date:   Fri Apr 3 10:12:40 2015 +0200

    x86: rename ldscript_failover.ld to failover.ld
    
    The ldscript_ prefix is redundant.
    
    This is inspired by the commit listed below, but rewritten to match
    upstream, and split in smaller pieces to keep intent clear.
    
    Change-Id: I0f005c0c2abe2fdd6911a2c579cb7ec49ae5c0b7
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Based-On-Change-Id: I50af7dacf616e0f8ff4c43f4acc679089ad7022b
    Based-On-Signed-off-by: Julius Werner <jwerner at chromium.org>
    Based-On-Reviewed-on: https://chromium-review.googlesource.com/219170
---
 src/arch/x86/Makefile.inc              |  2 +-
 src/arch/x86/init/failover.ld          | 74 ++++++++++++++++++++++++++++++++++
 src/arch/x86/init/ldscript_failover.ld | 74 ----------------------------------
 3 files changed, 75 insertions(+), 75 deletions(-)

diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 8e6ad6d..fe92a22 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -73,7 +73,7 @@ endif
 
 ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32),y)
 
-bootblock_lds = $(src)/arch/x86/init/ldscript_failover.ld
+bootblock_lds = $(src)/arch/x86/init/failover.ld
 bootblock_lds += $(src)/cpu/x86/16bit/entry16.ld
 bootblock_lds += $(src)/cpu/x86/16bit/reset16.ld
 bootblock_lds += $(src)/arch/x86/lib/id.ld
diff --git a/src/arch/x86/init/failover.ld b/src/arch/x86/init/failover.ld
new file mode 100644
index 0000000..318f429
--- /dev/null
+++ b/src/arch/x86/init/failover.ld
@@ -0,0 +1,74 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2006 Advanced Micro Devices, Inc.
+ * Copyright (C) 2008-2010 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* We use ELF as output format. So that we can debug the code in some form. */
+OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
+OUTPUT_ARCH(i386)
+
+MEMORY {
+	rom : ORIGIN = 0xffff0000, LENGTH = 64K
+}
+
+TARGET(binary)
+SECTIONS
+{
+	/* Symbol ap_sipi_vector must be aligned to 4kB to start AP CPUs
+	 * with Startup IPI message without RAM. Align .rom to next 4 byte
+	 * boundary anyway, so no pad byte appears between _rom and _start.
+	 */
+	.bogus ROMLOC_MIN : {
+		. = CONFIG_SIPI_VECTOR_IN_ROM ?	ALIGN(4096) : ALIGN(4);
+		ROMLOC = .;
+	} >rom = 0xff
+
+	/* This section might be better named .setup */
+	.rom ROMLOC : {
+		_rom = .;
+		ap_sipi_vector = .;
+		*(.rom.text);
+		*(.rom.data);
+		*(.rom.data.*);
+		*(.rodata.*);
+		_erom = .;
+	} >rom = 0xff
+
+	/* Allocation reserves extra 16 bytes here. Alignment requirements
+	 * may cause the total size of a section to change when the start
+	 * address gets applied.
+	 */
+	ROMLOC_MIN = 0xffffff00 - (_erom - _rom + 16) -
+		(CONFIG_SIPI_VECTOR_IN_ROM ? 4096 : 0);
+
+	/* Post-check proper SIPI vector. */
+	_bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || ((ap_sipi_vector & 0x0fff) == 0x0),
+		"Bad SIPI vector alignment");
+	_bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || (ap_sipi_vector == CONFIG_AP_SIPI_VECTOR),
+		"Address mismatch on AP_SIPI_VECTOR");
+
+	/DISCARD/ : {
+		*(.comment)
+		*(.note)
+		*(.comment.*)
+		*(.note.*)
+		*(.iplt)
+		*(.rel.*)
+		*(.igot.*)
+	}
+}
diff --git a/src/arch/x86/init/ldscript_failover.ld b/src/arch/x86/init/ldscript_failover.ld
deleted file mode 100644
index 318f429..0000000
--- a/src/arch/x86/init/ldscript_failover.ld
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Advanced Micro Devices, Inc.
- * Copyright (C) 2008-2010 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/* We use ELF as output format. So that we can debug the code in some form. */
-OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
-OUTPUT_ARCH(i386)
-
-MEMORY {
-	rom : ORIGIN = 0xffff0000, LENGTH = 64K
-}
-
-TARGET(binary)
-SECTIONS
-{
-	/* Symbol ap_sipi_vector must be aligned to 4kB to start AP CPUs
-	 * with Startup IPI message without RAM. Align .rom to next 4 byte
-	 * boundary anyway, so no pad byte appears between _rom and _start.
-	 */
-	.bogus ROMLOC_MIN : {
-		. = CONFIG_SIPI_VECTOR_IN_ROM ?	ALIGN(4096) : ALIGN(4);
-		ROMLOC = .;
-	} >rom = 0xff
-
-	/* This section might be better named .setup */
-	.rom ROMLOC : {
-		_rom = .;
-		ap_sipi_vector = .;
-		*(.rom.text);
-		*(.rom.data);
-		*(.rom.data.*);
-		*(.rodata.*);
-		_erom = .;
-	} >rom = 0xff
-
-	/* Allocation reserves extra 16 bytes here. Alignment requirements
-	 * may cause the total size of a section to change when the start
-	 * address gets applied.
-	 */
-	ROMLOC_MIN = 0xffffff00 - (_erom - _rom + 16) -
-		(CONFIG_SIPI_VECTOR_IN_ROM ? 4096 : 0);
-
-	/* Post-check proper SIPI vector. */
-	_bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || ((ap_sipi_vector & 0x0fff) == 0x0),
-		"Bad SIPI vector alignment");
-	_bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || (ap_sipi_vector == CONFIG_AP_SIPI_VECTOR),
-		"Address mismatch on AP_SIPI_VECTOR");
-
-	/DISCARD/ : {
-		*(.comment)
-		*(.note)
-		*(.comment.*)
-		*(.note.*)
-		*(.iplt)
-		*(.rel.*)
-		*(.igot.*)
-	}
-}



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