[coreboot-gerrit] Patch merged into coreboot/master: 33c10f8 urara: Configure UART line control to 8N1

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 33c10f8c32a16701ad601d491322fb2468111b9b
Author: Ionela Voinescu <ionela.voinescu at imgtec.com>
Date:   Thu Oct 30 14:49:53 2014 +0000

    urara: Configure UART line control to 8N1
    
    8bit, 1 stop bit, no parity
    
    BUG=chrome-os-partner:31438
    TEST=built urara bootblock and ran it on the Pistachio FPGA, observed
          expected console output.
    BRANCH=none
    
    Change-Id: Iface623f0b267f851e6d162d0321d56e3713a785
    Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
    Original-Commit-Id: 4122ae983dba907c10d0d0980863ae7bf94eda5e
    Original-Change-Id: I14fe343c98b11774b93b2724b6bffa3b45ea17b4
    Original-Signed-off-by: Ionela Voinescu <ionela.voinescu at imgtec.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/226551
    Original-Reviewed-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Commit-Queue: Vadim Bendebury <vbendeb at chromium.org>
    Original-Tested-by: Vadim Bendebury <vbendeb at chromium.org>
    Reviewed-on: http://review.coreboot.org/9185
    Tested-by: build bot (Jenkins)
    Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>


See http://review.coreboot.org/9185 for details.

-gerrit