[coreboot-gerrit] Patch merged into coreboot/master: 642e598 broadwell: Update PCIe configuration to follow BWG

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 642e598102a48a5ffd76aae0d21795881a56c6d8
Author: Kane Chen <kane.chen at intel.com>
Date:   Tue Sep 9 15:53:09 2014 -0700

    broadwell: Update PCIe configuration to follow BWG
    
    According to BIOS spec 8.14
    B0:D28:F0[5:4] should be set to 11
    
    BRANCH=none
    BUG=chrome-os-partner:28234
    TEST=build ok, boot to Auron and Samus
         make sure register is set and PCIE is working
    
    Change-Id: I4a7e990993c230dfc1ba83ea75f56757c2c18e46
    Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
    Original-Commit-Id: 82826e3c44c26252697677ec08b95a8f174bc360
    Original-Change-Id: I7c37245053ceae460dac0f18363f585244db72f8
    Original-Signed-off-by: Kane Chen <kane.chen at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/217414
    Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: http://review.coreboot.org/9197
    Tested-by: build bot (Jenkins)
    Reviewed-by: Patrick Georgi <pgeorgi at google.com>


See http://review.coreboot.org/9197 for details.

-gerrit