[coreboot-gerrit] Patch set updated for coreboot: 20b8079 x86/mtrr: Enable MTRR's before enabling caching

[Paul Menzel (paulepanter@users.sourceforge.net)]

Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6969

-gerrit

commit 20b8079f1ae5ea6588e95c6029cef3aeb0d37fe1
Author: Isaac Christensen <isaac.christensen at se-eng.com>
Date:   Wed Sep 24 14:59:32 2014 -0600

    x86/mtrr: Enable MTRR's before enabling caching
    
    Fix up the following commit by enabling the MTRR's before enabling caching.
    
    7756fe7 x86: Minimize work done with the caches disabled in mtrr functions.
    
    Also fix two typos in comments.
    
    Change-Id: If751b815f9dab781fc38c898cf692f0940c57695
    Signed-off-by: Isaac Christensen <isaac.christensen at se-eng.com>
---
 src/cpu/x86/mtrr/mtrr.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index e0392f7..69cd2d2 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -51,8 +51,8 @@
 #define OS_MTRRS   2
 #define MTRRS      (BIOS_MTRRS + OS_MTRRS)
 /*
- * Static storage size for variable MTRRs. Its sized sufficiently large to
- * handle different types of CPUs. Empiricially, 16 variable MTRRs has not
+ * Static storage size for variable MTRRs. It's sized sufficiently large to
+ * handle different types of CPUs. Empirically, 16 variable MTRRs has not
  * yet been observed.
  */
 #define NUM_MTRR_STATIC_STORAGE 16
@@ -769,7 +769,7 @@ static void commit_var_mtrrs(const struct var_mtrr_solution *sol)
 {
 	int i;
 
-	/* Write out the variable MTTRs. */
+	/* Write out the variable MTRRs. */
 	disable_cache();
 	for (i = 0; i < sol->num_used; i++) {
 		wrmsr(MTRRphysBase_MSR(i), sol->regs[i].base);
@@ -778,6 +778,7 @@ static void commit_var_mtrrs(const struct var_mtrr_solution *sol)
 	/* Clear the ones that are unused. */
 	for (; i < total_mtrrs; i++)
 		clear_var_mtrr(i);
+	enable_var_mtrr(sol->mtrr_default_type);
 	enable_cache();
 
 }
@@ -800,7 +801,6 @@ void x86_setup_var_mtrrs(unsigned int address_bits, unsigned int above4gb)
 	}
 
 	commit_var_mtrrs(sol);
-	enable_var_mtrr(sol->mtrr_default_type);
 }
 
 void x86_setup_mtrrs(void)