[coreboot-gerrit] New patch to review for coreboot: 68767d0 cpu/amd/agesa/family15rl/model_15_init.c: Enable TopologyExtensions

[Edward O'Callaghan (eocallaghan@alterapraxis.com)]

Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7616

-gerrit

commit 68767d01ef41a3fdfb078862b22541789e0319e9
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Mon Dec 1 03:37:04 2014 +1100

    cpu/amd/agesa/family15rl/model_15_init.c: Enable TopologyExtensions
    
    Change-Id: Ifaad4c3e9be01fa27956ea0c9efb9beddda4a6d2
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/cpu/amd/agesa/family15rl/model_15_init.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/src/cpu/amd/agesa/family15rl/model_15_init.c b/src/cpu/amd/agesa/family15rl/model_15_init.c
index 5cf78d1..4cba6ea 100644
--- a/src/cpu/amd/agesa/family15rl/model_15_init.c
+++ b/src/cpu/amd/agesa/family15rl/model_15_init.c
@@ -103,6 +103,17 @@ static void model_15_init(device_t dev)
 	printk(BIOS_DEBUG, "siblings = %02d, ", siblings);
 #endif
 
+	/* Enable TopologyExtensions */
+	msr = rdmsr_amd(CPU_ID_EXT_FEATURES_MSR);
+	msr.lo |= 1UL << 22; /* msr |= 1ULL << 54; */
+	msr.hi |= 0UL;
+	wrmsr_amd(CPU_ID_EXT_FEATURES_MSR, msr);
+	msr = rdmsr_amd(CPU_ID_EXT_FEATURES_MSR);
+	if (msr.lo & (1UL << 22)) {
+		cpu_idx = cpu_info()->index;
+		printk(BIOS_INFO, "Initializing Topology Extensions Support for CPU %u\n", cpu_idx);
+	}
+
 	/* DisableCf8ExtCfg */
 	msr = rdmsr(NB_CFG_MSR);
 	msr.hi &= ~(1 << (46 - 32));