[coreboot-gerrit] Patch merged into coreboot/master: fc1c1b5 intel/fsp_baytrail: add Gold3 FSP support
gerrit at coreboot.org
gerrit at coreboot.org
Fri Nov 21 23:05:21 CET 2014
the following patch was just integrated into master:
commit fc1c1b572f3523950cdf5cbf0c2967365700cfc3
Author: York Yang <york.yang at intel.com>
Date: Tue Nov 4 17:04:37 2014 -0700
intel/fsp_baytrail: add Gold3 FSP support
Baytrail Gold3 FSP adds a couple of parameters in UPD_DATA_REGION
making platform more configurable via devicetree.cb
Update the UPD_DATA_REGION structure and pass settings to FSP
Add Baytrail Gold2 and earlier FSP backward compatible, as Gold3
FSP changes UPD_DATA_REGION struct
Change-Id: Ia2d2d0595328ac771762a84da40697a3b7e900c6
Signed-off-by: York Yang <york.yang at intel.com>
Reviewed-on: http://review.coreboot.org/7334
Reviewed-by: Martin Roth <gaumless at gmail.com>
Tested-by: build bot (Jenkins)
See http://review.coreboot.org/7334 for details.
-gerrit
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