[coreboot-gerrit] New patch to review for coreboot: 8ae16ef AMD boards: constify romstage variables

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7313

-gerrit

commit 8ae16ef5c9887e409290363413aad6b4a223477d
Author: Patrick Georgi <pgeorgi at google.com>
Date:   Sat Nov 1 10:34:23 2014 +0100

    AMD boards: constify romstage variables
    
    That takes them out of .data
    
    Change-Id: Idf88ddaacb2f78ba6a0260e3511b34edc269731d
    Signed-off-by: Patrick Georgi <patrick at georgi-clan.de>
---
 src/mainboard/amd/thatcher/PlatformGnbPcie.c | 6 +++---
 src/mainboard/amd/torpedo/PlatformGnbPcie.c  | 6 +++---
 src/mainboard/amd/torpedo/gpio.h             | 4 ++--
 src/mainboard/asus/f2a85-m/PlatformGnbPcie.c | 6 +++---
 4 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/src/mainboard/amd/thatcher/PlatformGnbPcie.c b/src/mainboard/amd/thatcher/PlatformGnbPcie.c
index ec5d68d..4072112 100644
--- a/src/mainboard/amd/thatcher/PlatformGnbPcie.c
+++ b/src/mainboard/amd/thatcher/PlatformGnbPcie.c
@@ -71,7 +71,7 @@
  * 38 DP2_TX[P,N]6
  */
 
-PCIe_PORT_DESCRIPTOR PortList [] = {
+static const PCIe_PORT_DESCRIPTOR PortList [] = {
 	/* PCIe port, Lanes 15:8, PCI Device Number 2, PCIE SLOT x8 */
 	{
 		0, /* Descriptor flags */
@@ -121,7 +121,7 @@ PCIe_PORT_DESCRIPTOR PortList [] = {
 	},
 };
 
-PCIe_DDI_DESCRIPTOR DdiList [] = {
+static const PCIe_DDI_DESCRIPTOR DdiList [] = {
 	// DP0 to HDMI0/DP0
 	{
 		0,
@@ -142,7 +142,7 @@ PCIe_DDI_DESCRIPTOR DdiList [] = {
 	},
 };
 
-PCIe_COMPLEX_DESCRIPTOR Trinity = {
+static const PCIe_COMPLEX_DESCRIPTOR Trinity = {
         DESCRIPTOR_TERMINATE_LIST,
         0,
         &PortList[0],
diff --git a/src/mainboard/amd/torpedo/PlatformGnbPcie.c b/src/mainboard/amd/torpedo/PlatformGnbPcie.c
index b0b5dd6..a17a7ed 100644
--- a/src/mainboard/amd/torpedo/PlatformGnbPcie.c
+++ b/src/mainboard/amd/torpedo/PlatformGnbPcie.c
@@ -24,7 +24,7 @@
 
 #define FILECODE PROC_GNB_PCIE_FAMILY_0X12_F12PCIECOMPLEXCONFIG_FILECODE
 
-PCIe_PORT_DESCRIPTOR PortList [] = {
+static const PCIe_PORT_DESCRIPTOR PortList [] = {
 			// Initialize Port descriptor (PCIe port, Lanes 8:15, PCI Device Number 2, ...)
 			{
 			  0,   //Descriptor flags
@@ -69,7 +69,7 @@ PCIe_PORT_DESCRIPTOR PortList [] = {
 //			}
 };
 
-PCIe_DDI_DESCRIPTOR DdiList [] = {
+static const PCIe_DDI_DESCRIPTOR DdiList [] = {
 			// Initialize Ddi descriptor (DDI interface Lanes 24:27, DdA, ...)
 			{
 			  0,   //Descriptor flags
@@ -84,7 +84,7 @@ PCIe_DDI_DESCRIPTOR DdiList [] = {
 			}
 };
 
-PCIe_COMPLEX_DESCRIPTOR Llano = {
+static const PCIe_COMPLEX_DESCRIPTOR Llano = {
         DESCRIPTOR_TERMINATE_LIST,
         0,
         &PortList[0],
diff --git a/src/mainboard/amd/torpedo/gpio.h b/src/mainboard/amd/torpedo/gpio.h
index f8516a2..f8281f8 100644
--- a/src/mainboard/amd/torpedo/gpio.h
+++ b/src/mainboard/amd/torpedo/gpio.h
@@ -1995,7 +1995,7 @@ typedef struct _GPIO_SETTINGS
     u8 NonGpioGevent;
 } GPIO_SETTINGS;
 
-GPIO_SETTINGS gpio_table[]=
+const GPIO_SETTINGS gpio_table[]=
 {
   {GPIO_00_SELECT, GPIO_00_TYPE, GPO_00_LEVEL+GPIO_00_STICKY+GPIO_00_PULLUP+GPIO_00_PULLDOWN, GPIO_00_SELECT},
   {GPIO_01_SELECT, GPIO_01_TYPE, GPO_01_LEVEL+GPIO_01_STICKY+GPIO_01_PULLUP+GPIO_01_PULLDOWN, GPIO_01_SELECT},
@@ -2269,7 +2269,7 @@ typedef struct _GEVENT_SETTINGS
     u8 SmiControl;       // 0: Disable, 1: SMI 2: NMI 3: IRQ13
 } GEVENT_SETTINGS;
 
-GEVENT_SETTINGS gevent_table[] =
+const GEVENT_SETTINGS gevent_table[] =
 {
   {GEVENT_00_EVENTENABLE, GEVENT_00_SCITRIG, GEVENT_00_SCILEVEL, GEVENT_00_SMISCIEN, GEVENT_00_SCIS0EN, GEVENT_00_SCIMAP, GEVENT_00_SMITRIG, GEVENT_00_SMICONTROL},
   {GEVENT_01_EVENTENABLE, GEVENT_01_SCITRIG, GEVENT_01_SCILEVEL, GEVENT_01_SMISCIEN, GEVENT_01_SCIS0EN, GEVENT_01_SCIMAP, GEVENT_01_SMITRIG, GEVENT_01_SMICONTROL},
diff --git a/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c b/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c
index ee5b5ff..3a8be41 100644
--- a/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c
+++ b/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c
@@ -68,7 +68,7 @@
  * 38 DP2_TX[P,N]6
  */
 
-PCIe_PORT_DESCRIPTOR PortList [] = {
+static const PCIe_PORT_DESCRIPTOR PortList [] = {
 	/* PCIe port, Lanes 8:23, PCI Device Number 2, blue x16 slot */
 	{
 		0, /* Descriptor flags */
@@ -95,7 +95,7 @@ PCIe_PORT_DESCRIPTOR PortList [] = {
  * Tested and works: VGA/DVI
  * Untested: HDMI
  */
-PCIe_DDI_DESCRIPTOR DdiList [] = {
+static const PCIe_DDI_DESCRIPTOR DdiList [] = {
 	// DP0 to HDMI0/DP
 	{
 		0,
@@ -116,7 +116,7 @@ PCIe_DDI_DESCRIPTOR DdiList [] = {
 	},
 };
 
-PCIe_COMPLEX_DESCRIPTOR Trinity = {
+static const PCIe_COMPLEX_DESCRIPTOR Trinity = {
         DESCRIPTOR_TERMINATE_LIST,
         0,
         &PortList[0],