[coreboot-gerrit] New patch to review for coreboot: dcba07a mainboard/jetway/nf81-t56n-lf: Provide ACPI thermal zone
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Sat May 31 10:19:08 CEST 2014
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5889
-gerrit
commit dcba07ac3eb52463d5c69ee609b0728d082d4a49
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Sat May 31 16:19:40 2014 +1000
mainboard/jetway/nf81-t56n-lf: Provide ACPI thermal zone
NOTFORMERGE - yet -
Has a SystemIO conflict with 0x...220 - 0x...227 from somewhere else???
Change-Id: Ibb0295154fca23a3819953db0119692b26096e34
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
src/mainboard/jetway/nf81-t56n-lf/acpi/gpe.asl | 27 ++++++--
.../jetway/nf81-t56n-lf/acpi/mainboard.asl | 1 +
src/mainboard/jetway/nf81-t56n-lf/acpi/thermal.asl | 76 ++++++++++++++++++++--
src/mainboard/jetway/nf81-t56n-lf/dsdt.asl | 6 ++
4 files changed, 102 insertions(+), 8 deletions(-)
diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/gpe.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/gpe.asl
index 6ad1ad4..a30698a 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/acpi/gpe.asl
+++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/gpe.asl
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan at alterapraxis.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -17,7 +18,14 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-Scope(\_GPE) { /* Start Scope GPE */
+Scope(\_GPE)
+{
+ OperationRegion (IP, SystemIO, 0x0225, 0x02)
+ Field (IP, ByteAcc, NoLock, Preserve)
+ {
+ INDX, 8,
+ DAT0, 8
+ }
/* General event 3 */
Method(_L03) {
@@ -31,9 +39,21 @@ Scope(\_GPE) { /* Start Scope GPE */
}
/* Temp warning (TWarn) event */
- Method(_L09) {
+ Method(_L09, 0, NotSerialized)
+ {
/* DBGO("\\_GPE\\_L09\n") */
- /* Notify (\_TZ.TZ00, 0x80) */
+ Store (GBYT (0x66), Local0)
+ If (LNotEqual (And (Local0, 0x02), Zero))
+ {
+ Notify (\_TZ.THRM, 0x80)
+ }
+ }
+
+ Method (GBYT, 1, NotSerialized)
+ {
+ Store (Arg0, INDX)
+ Store (DAT0, Local0)
+ Return (Local0)
}
/* USB controller PME# */
@@ -80,4 +100,3 @@ Scope(\_GPE) { /* Start Scope GPE */
/* Contains the GPEs for USB overcurrent */
#include "usb_oc.asl"
-
diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl
index 47c17df..df2e781 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl
+++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl
@@ -34,6 +34,7 @@ Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed *
Name(OSTP, 3)
Name(OSV, Ones) /* Assume nothing */
Name(PMOD, One) /* Assume APIC */
+Name (TPCH, Zero) /* Thermal zone channel */
Scope(\_SB) {
Method(CkOT, 0, NotSerialized)
diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/thermal.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/thermal.asl
index 2f50475..b73a7ce 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/acpi/thermal.asl
+++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/thermal.asl
@@ -1,6 +1,8 @@
/*
* This file is part of the coreboot project.
*
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan at alterapraxis.com>
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
@@ -15,7 +17,73 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/* Thermal Zones have been #if 0 for a long time.
- * Removing it for now because it doesn't seem to
- * do anything when enabled anyway.
- */
+/* Thermal Zones. */
+
+Scope (\_TZ)
+{
+ OperationRegion (IP, SystemIO, 0x0225, 0x02)
+ Field (IP, ByteAcc, NoLock, Preserve)
+ {
+ INDX, 8,
+ DAT0, 8
+ }
+
+ ThermalZone (THRM)
+ {
+ Method (KELV, 1, NotSerialized)
+ {
+ Store (Arg0, Local1)
+ Multiply (0x0A, Local1, Local1)
+ Add (Local1, 0x0AAC, Local1)
+ Return (Local1)
+ }
+
+ Method (_TMP, 0, NotSerialized) // _TMP: Temperature
+ {
+ If (LEqual (TPCH, One))
+ {
+ While (LGreater (GBYT (0x7A), 0x7E))
+ {
+ Store (GBYT (0x7A), DBG8)
+ Sleep (0xFA)
+ Store (One, Local1)
+ Multiply (0x0A, Local1, Local1)
+ Add (Local1, 0x0AAC, Local1)
+ Return (Local1)
+ }
+ }
+
+ Return (KELV (CTMP ()))
+ }
+
+ Method (_CRT, 0, NotSerialized) // _CRT: Critical Temperature
+ {
+ Return (KELV (STMP ()))
+ }
+
+ Method (STMP, 0, NotSerialized)
+ {
+ Store (GBYT (0x82), Local0)
+ Return (Local0)
+ }
+
+ Method (CTMP, 0, NotSerialized)
+ {
+ Store (GBYT (0x7A), Local0)
+ Store (Local0, DBG8)
+ If (LGreaterEqual (Local0, 0x65))
+ {
+ Store (0x30, Local0)
+ }
+
+ Return (Local0)
+ }
+
+ Method (GBYT, 1, NotSerialized)
+ {
+ Store (Arg0, INDX)
+ Store (DAT0, Local0)
+ Return (Local0)
+ }
+ }
+}
diff --git a/src/mainboard/jetway/nf81-t56n-lf/dsdt.asl b/src/mainboard/jetway/nf81-t56n-lf/dsdt.asl
index a650bca..a67d816 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/dsdt.asl
+++ b/src/mainboard/jetway/nf81-t56n-lf/dsdt.asl
@@ -56,6 +56,12 @@ DefinitionBlock (
/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
#include "acpi/sleep.asl"
+ OperationRegion (DEB0, SystemIO, 0x80, One)
+ Field (DEB0, ByteAcc, NoLock, Preserve)
+ {
+ DBG8, 8
+ }
+
#include "acpi/gpe.asl"
#include <southbridge/amd/cimx/sb800/acpi/smbus.asl>
#include "acpi/thermal.asl"
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