[coreboot-gerrit] Patch set updated for coreboot: b419c1a mainboard/*: Convert to generic ITE superio romstage component
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Sat May 24 01:25:42 CEST 2014
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5737
-gerrit
commit b419c1ac7ba86a7f5cd25b4cac74f4a22f117ab7
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Wed May 14 19:15:08 2014 +1000
mainboard/*: Convert to generic ITE superio romstage component
Convert mainboard's that use model specific romstage functions of
it8712f to the generic framework by following the reasoning of:
a7d14a1 ite/common: Introduce common watchdog and 3.3V VSB helpers
Change-Id: I1485306a951103c9a4bc0dbe87c416c91f46c36f
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
src/mainboard/asus/m2v-mx_se/romstage.c | 6 +++---
src/mainboard/asus/m2v/romstage.c | 6 +++---
src/mainboard/asus/m4a78-em/romstage.c | 3 ++-
src/mainboard/asus/m4a785-m/romstage.c | 3 ++-
src/mainboard/siemens/sitemp_g1p1/romstage.c | 3 ++-
src/mainboard/technexion/tim5690/romstage.c | 3 ++-
src/mainboard/technexion/tim8690/romstage.c | 3 ++-
7 files changed, 16 insertions(+), 11 deletions(-)
diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c
index 0085bb4..d374828 100644
--- a/src/mainboard/asus/m2v-mx_se/romstage.c
+++ b/src/mainboard/asus/m2v-mx_se/romstage.c
@@ -46,7 +46,7 @@ unsigned int get_sbdn(unsigned bus);
#include <spd.h>
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
-#define WATCHDOG_DEV PNP_DEV(0x2e, IT8712F_GPIO)
+#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
static void memreset(int controllers, const struct mem_controller *ctrl) { }
static void activate_spd_rom(const struct mem_controller *ctrl) { }
@@ -129,8 +129,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
struct sys_info *sysinfo = &sysinfo_car;
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- it8712f_kill_watchdog();
- it8712f_enable_3vsbsw();
+ ite_kill_watchdog(GPIO_DEV);
+ ite_enable_3vsbsw(GPIO_DEV);
console_init();
enable_rom_decode();
diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c
index acf8f91..a2c6a03 100644
--- a/src/mainboard/asus/m2v/romstage.c
+++ b/src/mainboard/asus/m2v/romstage.c
@@ -46,7 +46,7 @@ unsigned int get_sbdn(unsigned bus);
#include <spd.h>
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
-#define WATCHDOG_DEV PNP_DEV(0x2e, IT8712F_GPIO)
+#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
#define CLKIN_DEV PNP_DEV(0x2e, IT8712F_GPIO)
#define IT8712F_GPIO_BASE 0x0a20
@@ -227,12 +227,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_24);
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- it8712f_kill_watchdog();
+ ite_kill_watchdog(GPIO_DEV);
console_init();
enable_rom_decode();
m2v_bus_init();
m2v_it8712f_gpio_init();
- it8712f_enable_3vsbsw();
+ ite_enable_3vsbsw(GPIO_DEV);
printk(BIOS_INFO, "now booting... \n");
diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c
index 93810d2..2620a13 100644
--- a/src/mainboard/asus/m4a78-em/romstage.c
+++ b/src/mainboard/asus/m4a78-em/romstage.c
@@ -51,6 +51,7 @@
#include "northbridge/amd/amdfam10/debug.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
static void activate_spd_rom(const struct mem_controller *ctrl) { }
@@ -99,7 +100,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sb7xx_51xx_lpc_init();
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- it8712f_kill_watchdog();
+ ite_kill_watchdog(GPIO_DEV);
console_init();
diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c
index b360636..ff04dc7 100644
--- a/src/mainboard/asus/m4a785-m/romstage.c
+++ b/src/mainboard/asus/m4a785-m/romstage.c
@@ -51,6 +51,7 @@
#include "northbridge/amd/amdfam10/debug.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
static void activate_spd_rom(const struct mem_controller *ctrl) { }
@@ -99,7 +100,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sb7xx_51xx_lpc_init();
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- it8712f_kill_watchdog();
+ ite_kill_watchdog(GPIO_DEV);
console_init();
diff --git a/src/mainboard/siemens/sitemp_g1p1/romstage.c b/src/mainboard/siemens/sitemp_g1p1/romstage.c
index b8af354..eca7af2 100644
--- a/src/mainboard/siemens/sitemp_g1p1/romstage.c
+++ b/src/mainboard/siemens/sitemp_g1p1/romstage.c
@@ -47,6 +47,7 @@
#include "northbridge/amd/amdk8/debug.c" /* After sb600_early_setup.c! */
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
/* CAN'T BE REMOVED! crt0.S will use it. I don't know WHY!*/
static void memreset(int controllers, const struct mem_controller *ctrl)
@@ -107,7 +108,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
check_cmos(); // rebooting in case of corrupted cmos !!!!!
#endif
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- it8712f_kill_watchdog();
+ ite_kill_watchdog(GPIO_DEV);
console_init();
#if defined(DUMP_CMOS_RAM) && (DUMP_CMOS_RAM == 1)
diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c
index 35351b1..68373b9 100644
--- a/src/mainboard/technexion/tim5690/romstage.c
+++ b/src/mainboard/technexion/tim5690/romstage.c
@@ -40,6 +40,7 @@
#include "southbridge/amd/sb600/early_setup.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
static void memreset(int controllers, const struct mem_controller *ctrl) { }
static void activate_spd_rom(const struct mem_controller *ctrl) { }
@@ -89,7 +90,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sb600_lpc_init();
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- it8712f_kill_watchdog();
+ ite_kill_watchdog(GPIO_DEV);
console_init();
diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c
index 7455df2..0ba0fce 100644
--- a/src/mainboard/technexion/tim8690/romstage.c
+++ b/src/mainboard/technexion/tim8690/romstage.c
@@ -40,6 +40,7 @@
#include "southbridge/amd/sb600/early_setup.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
static void memreset(int controllers, const struct mem_controller *ctrl) { }
static void activate_spd_rom(const struct mem_controller *ctrl) { }
@@ -84,7 +85,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sb600_lpc_init();
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- it8712f_kill_watchdog();
+ ite_kill_watchdog(GPIO_DEV);
console_init();
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