[coreboot-gerrit] Patch set updated for coreboot: 1a9631f mainboard/jetway/nf81-t56n-lf: Improve diags in romstage

Edward O'Callaghan (eocallaghan@alterapraxis.com) gerrit at coreboot.org
Mon May 5 11:01:19 CEST 2014


Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5465

-gerrit

commit 1a9631fc9a0d6f1bd3562e2f8ae05ef0c57a6892
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Sun Apr 6 12:34:56 2014 +1000

    mainboard/jetway/nf81-t56n-lf: Improve diags in romstage
    
    romstage reports a completely unintelligible printf of "error level:",
    fix this and document meaning of the return values in source.
    
    Change-Id: Ia2fb9a6206e08822f6c2f62b69bf22cdae2ba819
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/mainboard/jetway/nf81-t56n-lf/romstage.c | 28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)

diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/romstage.c
index 848faf7..8c05236 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/romstage.c
@@ -51,6 +51,20 @@
 /* Ensure Super I/O config address (i.e., 0x2e or 0x4e) matches that of devicetree.cb */
 #define SERIAL_DEV PNP_DEV(0x2e, F71869AD_SP1)
 
+/*
+ * Possible AGESA_STATUS values:
+ *
+ * 0x0 = AGESA_SUCCESS
+ * 0x1 = AGESA_UNSUPPORTED
+ * 0x2 = AGESA_BOUNDS_CHK
+ * 0x3 = AGESA_ALERT
+ * 0x4 = AGESA_WARNING
+ * 0x5 = AGESA_ERROR
+ * 0x6 = AGESA_CRITICAL
+ * 0x7 = AGESA_FATAL
+ */
+
+
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	u32 val;
@@ -91,7 +105,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	printk(BIOS_DEBUG, "agesawrapper_amdinitmmio ");
 	val = agesawrapper_amdinitmmio();
 	if (val)
-		printk(BIOS_DEBUG, "error level: %x \n", val);
+		printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val);
 	else
 		printk(BIOS_DEBUG, "passed.\n");
 
@@ -99,7 +113,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	printk(BIOS_DEBUG, "agesawrapper_amdinitreset ");
 	val = agesawrapper_amdinitreset();
 	if (val)
-		printk(BIOS_DEBUG, "error level: %x \n", val);
+		printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val);
 	else
 		printk(BIOS_DEBUG, "passed.\n");
 
@@ -107,7 +121,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	printk(BIOS_DEBUG, "agesawrapper_amdinitearly ");
 	val = agesawrapper_amdinitearly ();
 	if (val)
-		printk(BIOS_DEBUG, "error level: %x \n", val);
+		printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val);
 	else
 		printk(BIOS_DEBUG, "passed.\n");
 
@@ -118,7 +132,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
 		val = agesawrapper_amdinitpost ();
 		if (val)
-			printk(BIOS_DEBUG, "error level: %x \n", val);
+			printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val);
 		else
 			printk(BIOS_DEBUG, "passed.\n");
 
@@ -126,7 +140,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		printk(BIOS_DEBUG, "agesawrapper_amdinitenv ");
 		val = agesawrapper_amdinitenv ();
 		if (val)
-			printk(BIOS_DEBUG, "error level: %x \n", val);
+			printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val);
 		else
 			printk(BIOS_DEBUG, "passed.\n");
 
@@ -138,14 +152,14 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		printk(BIOS_DEBUG, "agesawrapper_amdinitresume ");
 		val = agesawrapper_amdinitresume();
 		if (val)
-			printk(BIOS_DEBUG, "error level: %x \n", val);
+			printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val);
 		else
 			printk(BIOS_DEBUG, "passed.\n");
 
 		printk(BIOS_DEBUG, "agesawrapper_amds3laterestore ");
 		val = agesawrapper_amds3laterestore ();
 		if (val)
-			printk(BIOS_DEBUG, "error level: %x \n", val);
+			printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val);
 		else
 			printk(BIOS_DEBUG, "passed.\n");
 



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