[coreboot-gerrit] Patch set updated for coreboot: 81cada3 chromeos: provide option to dynamically allocate ram oops buffer
Aaron Durbin (adurbin@google.com)
gerrit at coreboot.org
Tue Mar 4 22:20:30 CET 2014
Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5257
-gerrit
commit 81cada3cbd92ec41d9dd126f525d443c3cbf3111
Author: Aaron Durbin <adurbin at chromium.org>
Date: Fri Feb 14 00:30:04 2014 -0600
chromeos: provide option to dynamically allocate ram oops buffer
Fixing the location of the ram oops buffer can lead to certain
kernel and boot loaders being confused when there is a ram
reservation low in the address space. Alternatively provide
a mechanism to allocate the ram oops buffer in cbmem. As cbmem
is usually high in the address space it avoids low reservation
confusion.
The patch uncondtionally provides a GOOG9999 ACPI device with
a single memory resource describing the memory region used for
the ramoops region.
BUG=None
BRANCH=baytrail,haswell
TEST=Built and booted with and w/o dynamic ram oops. With
the corresponding kernel change things behave correctly.
Change-Id: Ide2bb4434768c9f9b90e125adae4324cb1d2d073
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
src/include/cbmem.h | 1 +
src/lib/cbmem_info.c | 1 +
src/vendorcode/google/chromeos/Kconfig | 7 +-
src/vendorcode/google/chromeos/Makefile.inc | 1 +
src/vendorcode/google/chromeos/acpi/chromeos.asl | 2 +
src/vendorcode/google/chromeos/acpi/gnvs.asl | 4 +-
src/vendorcode/google/chromeos/acpi/ramoops.asl | 43 ++++++++++
src/vendorcode/google/chromeos/chromeos.h | 15 ++++
src/vendorcode/google/chromeos/gnvs.c | 2 +
src/vendorcode/google/chromeos/gnvs.h | 4 +-
src/vendorcode/google/chromeos/ramoops.c | 99 ++++++++++++++++++++++++
11 files changed, 176 insertions(+), 3 deletions(-)
diff --git a/src/include/cbmem.h b/src/include/cbmem.h
index 7cb12b2..f103b30 100644
--- a/src/include/cbmem.h
+++ b/src/include/cbmem.h
@@ -62,6 +62,7 @@
#define CBMEM_ID_REFCODE 0x04efc0de
#define CBMEM_ID_REFCODE_CACHE 0x4efc0de5
#define CBMEM_ID_SMM_SAVE_SPACE 0x07e9acee
+#define CBMEM_ID_RAM_OOPS 0x05430095
#define CBMEM_ID_NONE 0x00000000
#define CBMEM_ID_AGESA_RUNTIME 0x41474553
#define CBMEM_ID_HOB_POINTER 0x484f4221
diff --git a/src/lib/cbmem_info.c b/src/lib/cbmem_info.c
index 339e6b9..42348e4 100644
--- a/src/lib/cbmem_info.c
+++ b/src/lib/cbmem_info.c
@@ -52,6 +52,7 @@ static struct cbmem_id_to_name {
{ CBMEM_ID_REFCODE, "REFCODE " },
{ CBMEM_ID_SMM_SAVE_SPACE, "SMM BACKUP " },
{ CBMEM_ID_REFCODE_CACHE, "REFCODE $ " },
+ { CBMEM_ID_RAM_OOPS, "RAMOOPS " },
};
void cbmem_print_entry(int n, u32 id, u64 base, u64 size)
diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig
index 2f17b7e..ed358f8 100644
--- a/src/vendorcode/google/chromeos/Kconfig
+++ b/src/vendorcode/google/chromeos/Kconfig
@@ -53,10 +53,15 @@ config CHROMEOS_RAMOOPS
bool "Reserve space for Chrome OS ramoops"
default y
+config CHROMEOS_RAMOOPS_DYNAMIC
+ bool "Allocate RAM oops buffer in cbmem"
+ default n
+ depends on CHROMEOS_RAMOOPS
+
config CHROMEOS_RAMOOPS_RAM_START
hex "Physical address of preserved RAM"
default 0x00f00000
- depends on CHROMEOS_RAMOOPS
+ depends on CHROMEOS_RAMOOPS && !CHROMEOS_RAMOOPS_DYNAMIC
config CHROMEOS_RAMOOPS_RAM_SIZE
hex "Size of preserved RAM"
diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc
index 4fa22ea..007bd57 100644
--- a/src/vendorcode/google/chromeos/Makefile.inc
+++ b/src/vendorcode/google/chromeos/Makefile.inc
@@ -25,6 +25,7 @@ romstage-$(CONFIG_ARCH_X86) += vboot.c
ramstage-y += gnvs.c
romstage-y += fmap.c
ramstage-y += fmap.c
+ramstage-$(CONFIG_CHROMEOS_RAMOOPS) += ramoops.c
smm-y += fmap.c
ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/chromeos.c),)
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/chromeos.c
diff --git a/src/vendorcode/google/chromeos/acpi/chromeos.asl b/src/vendorcode/google/chromeos/acpi/chromeos.asl
index 278296c..8f63f12 100644
--- a/src/vendorcode/google/chromeos/acpi/chromeos.asl
+++ b/src/vendorcode/google/chromeos/acpi/chromeos.asl
@@ -107,3 +107,5 @@ Device (CRHW)
Return (TSLM)
}
}
+
+#include "ramoops.asl"
diff --git a/src/vendorcode/google/chromeos/acpi/gnvs.asl b/src/vendorcode/google/chromeos/acpi/gnvs.asl
index dc4a0bf..5377a85 100644
--- a/src/vendorcode/google/chromeos/acpi/gnvs.asl
+++ b/src/vendorcode/google/chromeos/acpi/gnvs.asl
@@ -34,4 +34,6 @@ VBT9, 32, // 0x196 - FMAP base address
CHVD, 24576, // 0x19a - VDAT space filled by verified boot
VBTA, 32, // 0xd9a - pointer to smbios FWID
MEHH, 256, // 0xd9e - Management Engine Hash
- // 0xdbe
+RMOB, 32, // 0xdbe - RAM oops base address
+RMOL, 32, // 0xdc2 - RAM oops length
+ // 0xdc6
diff --git a/src/vendorcode/google/chromeos/acpi/ramoops.asl b/src/vendorcode/google/chromeos/acpi/ramoops.asl
new file mode 100644
index 0000000..e435489
--- /dev/null
+++ b/src/vendorcode/google/chromeos/acpi/ramoops.asl
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+Scope (\_SB)
+{
+ Device(RMOP)
+ {
+ Name (_HID, "GOOG9999")
+ Name (_CID, "GOOG9999")
+ Name (_UID, 1)
+
+ Name (RBUF, ResourceTemplate()
+ {
+ Memory32Fixed (ReadWrite, 0, 0, MRES)
+ })
+
+ Method (_CRS)
+ {
+ CreateDwordField (^RBUF, ^MRES._BAS, RBAS)
+ CreateDwordField (^RBUF, ^MRES._LEN, RLEN)
+ Store (\RMOB, RBAS)
+ Store (\RMOL, RLEN)
+ Return (^RBUF)
+ }
+ }
+}
diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h
index 7fe8f06..2a781ef 100644
--- a/src/vendorcode/google/chromeos/chromeos.h
+++ b/src/vendorcode/google/chromeos/chromeos.h
@@ -51,4 +51,19 @@ void init_chromeos(int bootmode);
int vboot_get_handoff_info(void **addr, uint32_t *size);
#endif
+#if CONFIG_CHROMEOS_RAMOOPS
+#include "gnvs.h"
+struct device;
+
+void chromeos_ram_oops_init(chromeos_acpi_t *chromeos);
+#if CONFIG_CHROMEOS_RAMOOPS_DYNAMIC
+static inline void chromeos_reserve_ram_oops(struct device *dev, int idx) {}
+#else /* CONFIG_CHROMEOS_RAMOOPS_DYNAMIC */
+void chromeos_reserve_ram_oops(struct device *dev, int idx);
+#endif /* CONFIG_CHROMEOS_RAMOOPS_DYNAMIC */
+#else /* !CONFIG_CHROMEOS_RAMOOPS */
+static inline void chromeos_ram_oops_init(chromeos_acpi_t *chromeos) {}
+static inline void chromeos_reserve_ram_oops(struct device *dev, int idx) {}
+#endif /* CONFIG_CHROMEOS_RAMOOPS */
+
#endif
diff --git a/src/vendorcode/google/chromeos/gnvs.c b/src/vendorcode/google/chromeos/gnvs.c
index 9f51097..528143c 100644
--- a/src/vendorcode/google/chromeos/gnvs.c
+++ b/src/vendorcode/google/chromeos/gnvs.c
@@ -72,6 +72,8 @@ void chromeos_init_vboot(chromeos_acpi_t *chromeos)
reason ? reason : ELOG_CROS_RECOVERY_MODE_BUTTON);
}
#endif
+
+ chromeos_ram_oops_init(chromeos);
}
void chromeos_set_me_hash(u32 *hash, int len)
diff --git a/src/vendorcode/google/chromeos/gnvs.h b/src/vendorcode/google/chromeos/gnvs.h
index 00fe443..fe7d77a 100644
--- a/src/vendorcode/google/chromeos/gnvs.h
+++ b/src/vendorcode/google/chromeos/gnvs.h
@@ -58,7 +58,9 @@ typedef struct {
u8 vdat[3072]; // 19a
u32 vbt10; // d9a smbios bios version
u32 mehh[8]; // d9e management engine hash
- // dbe
+ u32 ramoops_base; // dbe ramoops base address
+ u32 ramoops_len; // dc2 ramoops length
+ u8 pad[314]; // dc6-eff
} __attribute__((packed)) chromeos_acpi_t;
extern chromeos_acpi_t *vboot_data;
diff --git a/src/vendorcode/google/chromeos/ramoops.c b/src/vendorcode/google/chromeos/ramoops.c
new file mode 100644
index 0000000..500bc90
--- /dev/null
+++ b/src/vendorcode/google/chromeos/ramoops.c
@@ -0,0 +1,99 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+
+#include <stddef.h>
+#include <stdint.h>
+#include <bootstate.h>
+#include <console/console.h>
+#include <cbmem.h>
+#include <device/device.h>
+#include "chromeos.h"
+
+static void set_ramoops(chromeos_acpi_t *chromeos, void *ram_oops, size_t size)
+{
+ if (chromeos == NULL) {
+ printk(BIOS_DEBUG, "chromeos gnvs is NULL. ramoops not set.\n");
+ return;
+ }
+
+ printk(BIOS_DEBUG, "Ramoops buffer: 0x%zx at 0x%p.\n", size, ram_oops);
+ chromeos->ramoops_base = (uintptr_t)ram_oops;
+ chromeos->ramoops_len = size;
+}
+
+static void reserve_ram_oops_dynamic(chromeos_acpi_t *chromeos)
+{
+ const size_t size = CONFIG_CHROMEOS_RAMOOPS_RAM_SIZE;
+ void *ram_oops;
+
+ if (!IS_ENABLED(CONFIG_CHROMEOS_RAMOOPS_DYNAMIC))
+ return;
+
+ ram_oops = cbmem_add(CBMEM_ID_RAM_OOPS, size);
+
+ set_ramoops(chromeos, ram_oops, size);
+}
+
+#if CONFIG_CHROMEOS_RAMOOPS_DYNAMIC
+static inline void set_global_chromeos_pointer(chromeos_acpi_t *chromeos) {}
+#else /* !CONFIG_CHROMEOS_RAMOOPS_DYNAMIC */
+
+static const unsigned long ramoops_base = CONFIG_CHROMEOS_RAMOOPS_RAM_START;
+static const unsigned long ramoops_size = CONFIG_CHROMEOS_RAMOOPS_RAM_SIZE;
+
+/*
+ * Save pointer to chromeos structure in memory. This is needed because the
+ * memory reservation is not done when chromeos_init() is called. However,
+ * the pointer to the chromeos_acpi_t structure is needed to update the
+ * fields with the rserved base and size.
+ */
+static chromeos_acpi_t *g_chromeos;
+
+static void set_global_chromeos_pointer(chromeos_acpi_t *chromeos)
+{
+ g_chromeos = chromeos;
+}
+
+static void update_gnvs(void *arg)
+{
+ chromeos_acpi_t **chromeos = arg;
+
+ set_ramoops(*chromeos, (void *)ramoops_base, ramoops_size);
+}
+
+static BOOT_STATE_CALLBACK(bscb_ramoops, update_gnvs, &g_chromeos);
+
+void chromeos_reserve_ram_oops(struct device *dev, int idx)
+{
+ const unsigned long base = ramoops_base >> 10;
+ const unsigned long size = ramoops_size >> 10;
+
+ reserved_ram_resource(dev, idx, base, size);
+
+ boot_state_sched_on_exit(&bscb_ramoops, BS_WRITE_TABLES);
+}
+#endif /* CONFIG_CHROMEOS_RAMOOPS_DYNAMIC */
+
+void chromeos_ram_oops_init(chromeos_acpi_t *chromeos)
+{
+ set_global_chromeos_pointer(chromeos);
+ reserve_ram_oops_dynamic(chromeos);
+}
+
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